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| author | Richard Ball <richard.ball@arm.com> | 2024-03-26 13:54:31 +0000 |
|---|---|---|
| committer | Richard Ball <richard.ball@arm.com> | 2024-03-26 13:54:31 +0000 |
| commit | cab53aae43cf94171b01320c08302e47a5daa391 (patch) | |
| tree | 1c60aaa17e59811d49437235b10deb8c4a78a71b | |
| parent | 217e778a31d68815b029f5110825cd36caefd908 (diff) | |
| download | gcc-cab53aae43cf94171b01320c08302e47a5daa391.zip gcc-cab53aae43cf94171b01320c08302e47a5daa391.tar.gz gcc-cab53aae43cf94171b01320c08302e47a5daa391.tar.bz2 | |
aarch64: Fix SCHEDULER_IDENT for Cortex-A510 and Cortex-A520
The SCHEDULER_IDENT for these two CPUs
was incorrectly set to cortexa55.
This can cause sub-optimal asm
to be generated.
gcc/ChangeLog:
PR target/114272
* config/aarch64/aarch64-cores.def (AARCH64_CORE):
Change SCHEDULER_IDENT from cortexa55 to cortexa53
for Cortex-A510 and Cortex-A520.
| -rw-r--r-- | gcc/config/aarch64/aarch64-cores.def | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def index 7ebefcf..f69fc21 100644 --- a/gcc/config/aarch64/aarch64-cores.def +++ b/gcc/config/aarch64/aarch64-cores.def @@ -169,9 +169,9 @@ AARCH64_CORE("cortex-r82", cortexr82, cortexa53, V8R, (), cortexa53, 0x41, 0xd15 /* Armv9.0-A Architecture Processors. */ /* Arm ('A') cores. */ -AARCH64_CORE("cortex-a510", cortexa510, cortexa55, V9A, (SVE2_BITPERM, MEMTAG, I8MM, BF16), cortexa53, 0x41, 0xd46, -1) +AARCH64_CORE("cortex-a510", cortexa510, cortexa53, V9A, (SVE2_BITPERM, MEMTAG, I8MM, BF16), cortexa53, 0x41, 0xd46, -1) -AARCH64_CORE("cortex-a520", cortexa520, cortexa55, V9_2A, (SVE2_BITPERM, MEMTAG), cortexa53, 0x41, 0xd80, -1) +AARCH64_CORE("cortex-a520", cortexa520, cortexa53, V9_2A, (SVE2_BITPERM, MEMTAG), cortexa53, 0x41, 0xd80, -1) AARCH64_CORE("cortex-a710", cortexa710, cortexa57, V9A, (SVE2_BITPERM, MEMTAG, I8MM, BF16), neoversen2, 0x41, 0xd47, -1) |