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| author | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2013-07-02 10:21:36 +0000 |
|---|---|---|
| committer | Kyrylo Tkachov <ktkachov@gcc.gnu.org> | 2013-07-02 10:21:36 +0000 |
| commit | afc5e8a6a79510e207d23420417f78bcfb678b4e (patch) | |
| tree | 25a10a057b3938017a1d7f43daee9805bc5c6328 | |
| parent | 4bc21884b4d64d1fadadf41d70147162f927df98 (diff) | |
| download | gcc-afc5e8a6a79510e207d23420417f78bcfb678b4e.zip gcc-afc5e8a6a79510e207d23420417f78bcfb678b4e.tar.gz gcc-afc5e8a6a79510e207d23420417f78bcfb678b4e.tar.bz2 | |
arm.md (arm_andsi3_insn): Add alternatives for 16-bit encoding.
2013-07-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm.md (arm_andsi3_insn): Add alternatives for 16-bit
encoding.
(iorsi3_insn): Likewise.
(arm_xorsi3): Likewise.
From-SVN: r200593
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/arm/arm.md | 41 |
2 files changed, 31 insertions, 17 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a29ab30..727b579 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2013-07-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (arm_andsi3_insn): Add alternatives for 16-bit + encoding. + (iorsi3_insn): Likewise. + (arm_xorsi3): Likewise. + 2013-07-01 Sofiane Naci <sofiane.naci@arm.com> * arm.md (attribute "wtype"): Delete. Move attribute values from here diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 89e7b54..0fcdeea 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -2564,12 +2564,13 @@ ; ??? Check split length for Thumb-2 (define_insn_and_split "*arm_andsi3_insn" - [(set (match_operand:SI 0 "s_register_operand" "=r,r,r,r") - (and:SI (match_operand:SI 1 "s_register_operand" "r,r,r,r") - (match_operand:SI 2 "reg_or_int_operand" "I,K,r,?n")))] + [(set (match_operand:SI 0 "s_register_operand" "=r,l,r,r,r") + (and:SI (match_operand:SI 1 "s_register_operand" "%r,0,r,r,r") + (match_operand:SI 2 "reg_or_int_operand" "I,l,K,r,?n")))] "TARGET_32BIT" "@ and%?\\t%0, %1, %2 + and%?\\t%0, %1, %2 bic%?\\t%0, %1, #%B2 and%?\\t%0, %1, %2 #" @@ -2583,9 +2584,11 @@ INTVAL (operands[2]), operands[0], operands[1], 0); DONE; " - [(set_attr "length" "4,4,4,16") + [(set_attr "length" "4,4,4,4,16") (set_attr "predicable" "yes") - (set_attr "type" "simple_alu_imm,simple_alu_imm,*,simple_alu_imm")] + (set_attr "predicable_short_it" "no,yes,no,no,no") + (set_attr "type" + "simple_alu_imm,simple_alu_imm,*,*,simple_alu_imm")] ) (define_insn "*thumb1_andsi3_insn" @@ -3338,12 +3341,13 @@ ) (define_insn_and_split "*iorsi3_insn" - [(set (match_operand:SI 0 "s_register_operand" "=r,r,r,r") - (ior:SI (match_operand:SI 1 "s_register_operand" "%r,r,r,r") - (match_operand:SI 2 "reg_or_int_operand" "I,K,r,?n")))] + [(set (match_operand:SI 0 "s_register_operand" "=r,l,r,r,r") + (ior:SI (match_operand:SI 1 "s_register_operand" "%r,0,r,r,r") + (match_operand:SI 2 "reg_or_int_operand" "I,l,K,r,?n")))] "TARGET_32BIT" "@ orr%?\\t%0, %1, %2 + orr%?\\t%0, %1, %2 orn%?\\t%0, %1, #%B2 orr%?\\t%0, %1, %2 #" @@ -3353,14 +3357,15 @@ || (TARGET_THUMB2 && const_ok_for_arm (~INTVAL (operands[2]))))" [(clobber (const_int 0))] { - arm_split_constant (IOR, SImode, curr_insn, + arm_split_constant (IOR, SImode, curr_insn, INTVAL (operands[2]), operands[0], operands[1], 0); DONE; } - [(set_attr "length" "4,4,4,16") - (set_attr "arch" "32,t2,32,32") + [(set_attr "length" "4,4,4,4,16") + (set_attr "arch" "32,t2,t2,32,32") (set_attr "predicable" "yes") - (set_attr "type" "simple_alu_imm,simple_alu_imm,*,*")] + (set_attr "predicable_short_it" "no,yes,no,no,no") + (set_attr "type" "simple_alu_imm,*,simple_alu_imm,*,*")] ) (define_insn "*thumb1_iorsi3_insn" @@ -3512,13 +3517,14 @@ ) (define_insn_and_split "*arm_xorsi3" - [(set (match_operand:SI 0 "s_register_operand" "=r,r,r") - (xor:SI (match_operand:SI 1 "s_register_operand" "%r,r,r") - (match_operand:SI 2 "reg_or_int_operand" "I,r,?n")))] + [(set (match_operand:SI 0 "s_register_operand" "=r,l,r,r") + (xor:SI (match_operand:SI 1 "s_register_operand" "%r,0,r,r") + (match_operand:SI 2 "reg_or_int_operand" "I,l,r,?n")))] "TARGET_32BIT" "@ eor%?\\t%0, %1, %2 eor%?\\t%0, %1, %2 + eor%?\\t%0, %1, %2 #" "TARGET_32BIT && CONST_INT_P (operands[2]) @@ -3529,9 +3535,10 @@ INTVAL (operands[2]), operands[0], operands[1], 0); DONE; } - [(set_attr "length" "4,4,16") + [(set_attr "length" "4,4,4,16") (set_attr "predicable" "yes") - (set_attr "type" "simple_alu_imm,*,*")] + (set_attr "predicable_short_it" "no,yes,no,no") + (set_attr "type" "simple_alu_imm,*,*,*")] ) (define_insn "*thumb1_xorsi3_insn" |