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| author | YunQiang Su <syq@gcc.gnu.org> | 2024-05-08 19:04:33 +0800 |
|---|---|---|
| committer | YunQiang Su <syq@debian.org> | 2024-05-09 16:08:40 +0800 |
| commit | 9ba01240864ac446052d97692e2199539b7c76d8 (patch) | |
| tree | 6a215bcb3239a9076bd97342c6637afc3f8145f1 | |
| parent | 4d38e88227ea48e559a2f354c0e62d372e181b82 (diff) | |
| download | gcc-9ba01240864ac446052d97692e2199539b7c76d8.zip gcc-9ba01240864ac446052d97692e2199539b7c76d8.tar.gz gcc-9ba01240864ac446052d97692e2199539b7c76d8.tar.bz2 | |
MIPS: Support constraint 'w' for MSA instruction
Support syntax like:
asm volatile ("fmadd.d %w0, %w1, %w2" : "+w"(a): "w"(b), "w"(c));
gcc
* config/mips/constraints.md: Add new constraint 'w'.
gcc/testsuite
* gcc.target/mips/msa-inline-asm.c: New test.
| -rw-r--r-- | gcc/config/mips/constraints.md | 3 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/msa-inline-asm.c | 9 |
2 files changed, 12 insertions, 0 deletions
diff --git a/gcc/config/mips/constraints.md b/gcc/config/mips/constraints.md index a96028d..f5c8817 100644 --- a/gcc/config/mips/constraints.md +++ b/gcc/config/mips/constraints.md @@ -29,6 +29,9 @@ (define_register_constraint "f" "TARGET_HARD_FLOAT ? FP_REGS : NO_REGS" "A floating-point register (if available).") +(define_register_constraint "w" "ISA_HAS_MSA ? FP_REGS : NO_REGS" + "A MIPS SIMD register (if available).") + (define_register_constraint "h" "NO_REGS" "Formerly the @code{hi} register. This constraint is no longer supported.") diff --git a/gcc/testsuite/gcc.target/mips/msa-inline-asm.c b/gcc/testsuite/gcc.target/mips/msa-inline-asm.c new file mode 100644 index 0000000..bdf6816 --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/msa-inline-asm.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-mno-mips16 -mfp64 -mhard-float -mmsa" } */ + +double +f(double a, double b, double c) { + asm volatile ("fmadd.d %w0, %w1, %w2" : "+w"(a): "w"(b), "w"(c)); + return a; +} +/* { dg-final { scan-assembler "fmadd.d \\\$w0, \\\$w\[0-9\]*, \\\$w\[0-9\]*" } } */ |