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| author | Richard Biener <rguenther@suse.de> | 2024-01-31 09:09:50 +0100 |
|---|---|---|
| committer | Richard Biener <rguenther@suse.de> | 2024-01-31 10:07:53 +0100 |
| commit | 924137b9012cee5603482242de08fbf0b2030f6a (patch) | |
| tree | 5068cb9de13cd00f22b3590a246bf8b652486bb2 | |
| parent | e7964bf623c6df3cb415eeafd458b0b8394e6ea4 (diff) | |
| download | gcc-924137b9012cee5603482242de08fbf0b2030f6a.zip gcc-924137b9012cee5603482242de08fbf0b2030f6a.tar.gz gcc-924137b9012cee5603482242de08fbf0b2030f6a.tar.bz2 | |
tree-optimization/113670 - gather/scatter to/from hard registers
The following makes sure we're not taking the address of hard
registers when vectorizing appearant gathers or scatters to/from
them.
PR tree-optimization/113670
* tree-vect-data-refs.cc (vect_check_gather_scatter):
Make sure we can take the address of the reference base.
* gcc.target/i386/pr113670.c: New testcase.
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr113670.c | 16 | ||||
| -rw-r--r-- | gcc/tree-vect-data-refs.cc | 5 |
2 files changed, 21 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/i386/pr113670.c b/gcc/testsuite/gcc.target/i386/pr113670.c new file mode 100644 index 0000000..8b9d374 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr113670.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-msse2 -O2 -fno-vect-cost-model" } */ + +typedef float __attribute__ ((vector_size (16))) vec; +typedef int __attribute__ ((vector_size (16))) ivec; +ivec x; + +void +test (void) +{ + register vec a asm("xmm3"), b asm("xmm4"); + register ivec c asm("xmm5"); + for (int i = 0; i < 4; i++) + c[i] = a[i] < b[i] ? -1 : 1; + x = c; +} diff --git a/gcc/tree-vect-data-refs.cc b/gcc/tree-vect-data-refs.cc index f592aeb..e6a3035 100644 --- a/gcc/tree-vect-data-refs.cc +++ b/gcc/tree-vect-data-refs.cc @@ -4325,6 +4325,11 @@ vect_check_gather_scatter (stmt_vec_info stmt_info, loop_vec_info loop_vinfo, if (!multiple_p (pbitpos, BITS_PER_UNIT)) return false; + /* We need to be able to form an address to the base which for example + isn't possible for hard registers. */ + if (may_be_nonaddressable_p (base)) + return false; + poly_int64 pbytepos = exact_div (pbitpos, BITS_PER_UNIT); if (TREE_CODE (base) == MEM_REF) |