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authorHaochen Gui <guihaoc@gcc.gnu.org>2024-08-19 10:35:47 +0800
committerHaochen Gui <guihaoc@gcc.gnu.org>2024-08-19 10:40:43 +0800
commit8d6c6fbc5271dde433998c09407b30e2cf195420 (patch)
tree8feb51cce18cd8615ea3bf2fff76c0aa2fba6a52
parent7f62e7104ebc11c4570745972a023579922ef265 (diff)
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aarch64: Implement 16-byte vector mode const0 store by TImode
gcc/ * config/aarch64/aarch64-simd.md (mov<mode> for VSTRUCT_QD): Expand 16-byte vector mode const0 store by TImode.
-rw-r--r--gcc/config/aarch64/aarch64-simd.md11
1 files changed, 10 insertions, 1 deletions
diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
index 475f197..23c03a9 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -7809,7 +7809,16 @@
(match_operand:VSTRUCT_QD 1 "general_operand"))]
"TARGET_FLOAT"
{
- if (can_create_pseudo_p ())
+ if (known_eq (GET_MODE_SIZE (<MODE>mode), 16)
+ && operands[1] == CONST0_RTX (<MODE>mode)
+ && MEM_P (operands[0])
+ && (can_create_pseudo_p ()
+ || memory_address_p (TImode, XEXP (operands[0], 0))))
+ {
+ operands[0] = adjust_address (operands[0], TImode, 0);
+ operands[1] = CONST0_RTX (TImode);
+ }
+ else if (can_create_pseudo_p ())
{
if (GET_CODE (operands[0]) != REG)
operands[1] = force_reg (<MODE>mode, operands[1]);