aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorH.J. Lu <hongjiu.lu@intel.com>2013-12-06 17:36:22 +0000
committerH.J. Lu <hjl@gcc.gnu.org>2013-12-06 09:36:22 -0800
commit86bb84f1786df77d0bd5087a7d88f028fc22fe53 (patch)
tree6af9022dc9606f2b0450266c165f1f10aa230100
parent6b3d1113456722cb2b68a83d5ecdbca748a16055 (diff)
downloadgcc-86bb84f1786df77d0bd5087a7d88f028fc22fe53.zip
gcc-86bb84f1786df77d0bd5087a7d88f028fc22fe53.tar.gz
gcc-86bb84f1786df77d0bd5087a7d88f028fc22fe53.tar.bz2
Change -mtune=ia to -mtune=intel
* config.gcc: Change --with-cpu=ia to --with-cpu=intel. * config/i386/i386.c (cpu_names): Replace "ia" with "intel". (processor_alias_table): Likewise. (ix86_option_override_internal): Likewise. * config/i386/i386.h (target_cpu_default): Replace TARGET_CPU_DEFAULT_ia with TARGET_CPU_DEFAULT_intel. * doc/invoke.texi: Replace -mtune=ia with -mtune=intel. From-SVN: r205754
-rw-r--r--gcc/ChangeLog12
-rw-r--r--gcc/config.gcc14
-rw-r--r--gcc/config/i386/i386.c8
-rw-r--r--gcc/config/i386/i386.h2
-rw-r--r--gcc/doc/invoke.texi6
5 files changed, 27 insertions, 15 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0027a4c..d218d42 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,15 @@
+2013-12-06 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config.gcc: Change --with-cpu=ia to --with-cpu=intel.
+
+ * config/i386/i386.c (cpu_names): Replace "ia" with "intel".
+ (processor_alias_table): Likewise.
+ (ix86_option_override_internal): Likewise.
+ * config/i386/i386.h (target_cpu_default): Replace
+ TARGET_CPU_DEFAULT_ia with TARGET_CPU_DEFAULT_intel.
+
+ * doc/invoke.texi: Replace -mtune=ia with -mtune=intel.
+
2013-12-06 Uros Bizjak <ubizjak@gmail.com>
PR target/59405
diff --git a/gcc/config.gcc b/gcc/config.gcc
index dd180a0..dc76c82 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1398,7 +1398,7 @@ i[34567]86-*-linux* | i[34567]86-*-kfreebsd*-gnu | i[34567]86-*-knetbsd*-gnu | i
TM_MULTILIB_CONFIG=`echo $TM_MULTILIB_CONFIG | sed 's/^,//'`
need_64bit_isa=yes
case X"${with_cpu}" in
- Xgeneric|Xia|Xatom|Xslm|Xcore2|Xcorei7|Xcorei7-avx|Xnocona|Xx86-64|Xbdver4|Xbdver3|Xbdver2|Xbdver1|Xbtver2|Xbtver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3)
+ Xgeneric|Xintel|Xatom|Xslm|Xcore2|Xcorei7|Xcorei7-avx|Xnocona|Xx86-64|Xbdver4|Xbdver3|Xbdver2|Xbdver1|Xbtver2|Xbtver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3)
;;
X)
if test x$with_cpu_64 = x; then
@@ -1407,7 +1407,7 @@ i[34567]86-*-linux* | i[34567]86-*-kfreebsd*-gnu | i[34567]86-*-knetbsd*-gnu | i
;;
*)
echo "Unsupported CPU used in --with-cpu=$with_cpu, supported values:" 1>&2
- echo "generic ia atom slm core2 corei7 corei7-avx nocona x86-64 bdver4 bdver3 bdver2 bdver1 btver2 btver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2
+ echo "generic intel atom slm core2 corei7 corei7-avx nocona x86-64 bdver4 bdver3 bdver2 bdver1 btver2 btver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2
exit 1
;;
esac
@@ -1519,7 +1519,7 @@ i[34567]86-*-solaris2* | x86_64-*-solaris2.1[0-9]*)
tmake_file="$tmake_file i386/t-sol2-64"
need_64bit_isa=yes
case X"${with_cpu}" in
- Xgeneric|Xia|Xatom|Xslm|Xcore2|Xcorei7|Xcorei7-avx|Xnocona|Xx86-64|Xbdver4|Xbdver3|Xbdver2|Xbdver1|Xbtver2|Xbtver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3)
+ Xgeneric|Xintel|Xatom|Xslm|Xcore2|Xcorei7|Xcorei7-avx|Xnocona|Xx86-64|Xbdver4|Xbdver3|Xbdver2|Xbdver1|Xbtver2|Xbtver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3)
;;
X)
if test x$with_cpu_64 = x; then
@@ -1528,7 +1528,7 @@ i[34567]86-*-solaris2* | x86_64-*-solaris2.1[0-9]*)
;;
*)
echo "Unsupported CPU used in --with-cpu=$with_cpu, supported values:" 1>&2
- echo "generic ia atom slm core2 corei7 corei7-avx nocona x86-64 bdver4 bdver3 bdver2 bdver1 btver2 btver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2
+ echo "generic intel atom slm core2 corei7 corei7-avx nocona x86-64 bdver4 bdver3 bdver2 bdver1 btver2 btver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2
exit 1
;;
esac
@@ -1604,7 +1604,7 @@ i[34567]86-*-mingw* | x86_64-*-mingw*)
if test x$enable_targets = xall; then
tm_defines="${tm_defines} TARGET_BI_ARCH=1"
case X"${with_cpu}" in
- Xgeneric|Xia|Xatom|Xslm|Xcore2|Xcorei7|Xcorei7-avx|Xnocona|Xx86-64|Xbdver4|Xbdver3|Xbdver2|Xbdver1|Xbtver2|Xbtver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3)
+ Xgeneric|Xintel|Xatom|Xslm|Xcore2|Xcorei7|Xcorei7-avx|Xnocona|Xx86-64|Xbdver4|Xbdver3|Xbdver2|Xbdver1|Xbtver2|Xbtver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3)
;;
X)
if test x$with_cpu_64 = x; then
@@ -1613,7 +1613,7 @@ i[34567]86-*-mingw* | x86_64-*-mingw*)
;;
*)
echo "Unsupported CPU used in --with-cpu=$with_cpu, supported values:" 1>&2
- echo "generic ia atom slm core2 corei7 Xcorei7-avx nocona x86-64 bdver4 bdver3 bdver2 bdver1 btver2 btver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2
+ echo "generic intel atom slm core2 corei7 Xcorei7-avx nocona x86-64 bdver4 bdver3 bdver2 bdver1 btver2 btver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2
exit 1
;;
esac
@@ -3664,7 +3664,7 @@ case "${target}" in
esac
# OK
;;
- "" | x86-64 | generic | ia | native \
+ "" | x86-64 | generic | intel | native \
| k8 | k8-sse3 | athlon64 | athlon64-sse3 | opteron \
| opteron-sse3 | athlon-fx | bdver4 | bdver3 | bdver2 \
| bdver1 | btver2 | btver1 | amdfam10 | barcelona \
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index c742659..5dde632 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -2434,7 +2434,7 @@ static const char *const cpu_names[TARGET_CPU_DEFAULT_max] =
"core-avx2",
"atom",
"slm",
- "ia",
+ "intel",
"geode",
"k6",
"k6-2",
@@ -3143,7 +3143,7 @@ ix86_option_override_internal (bool main_args_p,
PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_SSSE3
| PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16 | PTA_POPCNT | PTA_AES
| PTA_PCLMUL | PTA_RDRND | PTA_MOVBE | PTA_FXSR},
- {"ia", PROCESSOR_SLM, CPU_SLM,
+ {"intel", PROCESSOR_SLM, CPU_SLM,
PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_SSSE3
| PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16 | PTA_POPCNT | PTA_FXSR},
{"geode", PROCESSOR_GEODE, CPU_GEODE,
@@ -3632,8 +3632,8 @@ ix86_option_override_internal (bool main_args_p,
if (!strcmp (opts->x_ix86_arch_string, "generic"))
error ("generic CPU can be used only for %stune=%s %s",
prefix, suffix, sw);
- else if (!strcmp (ix86_arch_string, "ia"))
- error ("ia CPU can be used only for %stune=%s %s",
+ else if (!strcmp (ix86_arch_string, "intel"))
+ error ("intel CPU can be used only for %stune=%s %s",
prefix, suffix, sw);
else if (!strncmp (opts->x_ix86_arch_string, "generic", 7) || i == pta_size)
error ("bad value (%s) for %sarch=%s %s",
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index db81aea..7efd1e0 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -626,7 +626,7 @@ enum target_cpu_default
TARGET_CPU_DEFAULT_haswell,
TARGET_CPU_DEFAULT_atom,
TARGET_CPU_DEFAULT_slm,
- TARGET_CPU_DEFAULT_ia,
+ TARGET_CPU_DEFAULT_intel,
TARGET_CPU_DEFAULT_geode,
TARGET_CPU_DEFAULT_k6,
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index cfb9b38..76149a3 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -14778,11 +14778,11 @@ generic instruction set applicable to all processors. In contrast,
@option{-mtune} indicates the processor (or, in this case, collection of
processors) for which the code is optimized.
-@item ia
+@item intel
Produce code optimized for the most current Intel processors, which are
Haswell and Silvermont for this version of GCC. If you know the CPU
on which your code will run, then you should use the corresponding
-@option{-mtune} or @option{-march} option instead of @option{-mtune=ia}.
+@option{-mtune} or @option{-march} option instead of @option{-mtune=intel}.
But, if you want your application performs better on both Haswell and
Silvermont, then you should use this option.
@@ -14792,7 +14792,7 @@ GCC, code generation controlled by this option will change to reflect
the most current Intel processors at the time that version of GCC is
released.
-There is no @option{-march=ia} option because @option{-march} indicates
+There is no @option{-march=intel} option because @option{-march} indicates
the instruction set the compiler can use, and there is no common
instruction set applicable to all processors. In contrast,
@option{-mtune} indicates the processor (or, in this case, collection of