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| author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2017-07-07 17:02:58 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@gcc.gnu.org> | 2017-07-07 17:02:58 +0000 |
| commit | 6a69355ccf7c05c452ff1bea1fac1508d44bec5c (patch) | |
| tree | 54899f378ee4e4eaf5bc8241293f808b840f50d2 | |
| parent | 5e32025a9e9f6060b499868b1f93cd2f7018c6c9 (diff) | |
| download | gcc-6a69355ccf7c05c452ff1bea1fac1508d44bec5c.zip gcc-6a69355ccf7c05c452ff1bea1fac1508d44bec5c.tar.gz gcc-6a69355ccf7c05c452ff1bea1fac1508d44bec5c.tar.bz2 | |
re PR target/81348 (PowerPC64: Code built with -mcpu=power9 hits SEGV in RTL split2)
[gcc]
2017-07-07 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/81348
* config/rs6000/rs6000.md (HI sign_extend splitter): Use the
correct operand in doing the split.
[gcc/testsuite]
2017-07-07 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/81348
* gcc.target/powerpc/pr81348.c: New test.
From-SVN: r250054
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 2 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/powerpc/pr81348.c | 24 |
4 files changed, 36 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1a78572..85cb864 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2017-07-07 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/81348 + * config/rs6000/rs6000.md (HI sign_extend splitter): Use the + correct operand in doing the split. + 2017-07-07 Carl Love <cel@us.ibm.com> * config/rs6000/rs6000-c: Add support for built-in function diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index f78dbf9..2fd9ef0 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -940,7 +940,7 @@ (set (match_dup 0) (sign_extend:EXTHI (match_dup 2)))] { - operands[2] = gen_rtx_REG (HImode, REGNO (operands[1])); + operands[2] = gen_rtx_REG (HImode, REGNO (operands[0])); }) (define_insn_and_split "*extendhi<mode>2_dot" diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index b6f6f80..cc0e5b8 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2017-07-07 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/81348 + * gcc.target/powerpc/pr81348.c: New test. + 2017-07-07 Szabolcs Nagy <szabolcs.nagy@arm.com> * gfortran.dg/vect/pr60510.f: Require vect_double support. diff --git a/gcc/testsuite/gcc.target/powerpc/pr81348.c b/gcc/testsuite/gcc.target/powerpc/pr81348.c new file mode 100644 index 0000000..e8e10bb --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr81348.c @@ -0,0 +1,24 @@ +/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-options "-mcpu=power9 -Og" } */ + +/* PR target/81348: Compiler died in doing short->float conversion due to using + the wrong register in a define_split. */ + +int a; +short b; +float ***c; + +void d(void) +{ + int e = 3; + + if (a) + e = b; + + ***c = e; +} + +/* { dg-final { scan-assembler {\mlxsihzx\M} } } */ +/* { dg-final { scan-assembler {\mvextsh2d\M} } } */ |