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author | GCC Administrator <gccadmin@gcc.gnu.org> | 2024-04-01 00:16:45 +0000 |
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committer | GCC Administrator <gccadmin@gcc.gnu.org> | 2024-04-01 00:16:45 +0000 |
commit | 1831a5e13b321d6f687a4f643320dd97896a374f (patch) | |
tree | 6696f628c32e18da9dd331493c6ebd2518633713 | |
parent | 14d0c863aa9415f5d78047910233d67d91f4ecf5 (diff) | |
download | gcc-1831a5e13b321d6f687a4f643320dd97896a374f.zip gcc-1831a5e13b321d6f687a4f643320dd97896a374f.tar.gz gcc-1831a5e13b321d6f687a4f643320dd97896a374f.tar.bz2 |
Daily bump.
-rw-r--r-- | gcc/ChangeLog | 15 | ||||
-rw-r--r-- | gcc/DATESTAMP | 2 | ||||
-rw-r--r-- | gcc/m2/ChangeLog | 8 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 7 |
4 files changed, 31 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 93492b8..63330b2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,18 @@ +2024-03-31 Jeff Law <jlaw@ventanamicro.com> + + * config/riscv/xiangshan.md (xiangshan_jump): Add branch, jalr, ret + and sfb_alu. + +2024-03-31 Pan Li <pan2.li@intel.com> + + * config/riscv/riscv-vector-builtins.cc (expand_builtin): Take + the term built-in over builtin. + +2024-03-31 Pan Li <pan2.li@intel.com> + + * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): + Remove unused var decl. + 2024-03-30 Xi Ruoyao <xry111@xry111.site> PR target/114175 diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index bba4e6d..6a6c7bc 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20240331 +20240401 diff --git a/gcc/m2/ChangeLog b/gcc/m2/ChangeLog index f425751..eec4326 100644 --- a/gcc/m2/ChangeLog +++ b/gcc/m2/ChangeLog @@ -1,3 +1,11 @@ +2024-03-31 Christophe Lyon <christophe.lyon@linaro.org> + + * Make-lang.in (m2.install-info): Fix rule. + +2024-03-31 Christophe Lyon <christophe.lyon@linaro.org> + + * Make-lang.in (install-html): New rule. + 2024-03-28 Gaius Mulley <gaiusmod2@gmail.com> PR modula2/114520 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index ddad777..a379746 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2024-03-31 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-7.c: + Adjust test dg-error. + * gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-8.c: + Ditto. + 2024-03-29 Guillaume Gomez <guillaume1.gomez@gmail.com> * jit.dg/test-pointer_size.c: New file. |