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author | Uros Bizjak <uros@gcc.gnu.org> | 2016-04-28 18:35:03 +0200 |
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committer | Uros Bizjak <uros@gcc.gnu.org> | 2016-04-28 18:35:03 +0200 |
commit | e41ebdf1c8fa94e1bb724a939d014b5f515496f0 (patch) | |
tree | bb600818c2bafaac6b42257bbb69acc3b3a34455 | |
parent | 893100c3fa9b3049ce84dcc0c1a839ddc7a21387 (diff) | |
download | gcc-e41ebdf1c8fa94e1bb724a939d014b5f515496f0.zip gcc-e41ebdf1c8fa94e1bb724a939d014b5f515496f0.tar.gz gcc-e41ebdf1c8fa94e1bb724a939d014b5f515496f0.tar.bz2 |
i386.md (zeroing peephole2): Use general_reg_operand.
* config/i386/i386.md (zeroing peephole2): Use general_reg_operand.
(or $-1,reg peephole2): Ditto.
(strict_low_part zeroing peephole2): Use SWI12 mode iterator.
From-SVN: r235581
-rw-r--r-- | gcc/ChangeLog | 8 | ||||
-rw-r--r-- | gcc/config/i386/i386.md | 16 |
2 files changed, 13 insertions, 11 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 52be94c..3defcd2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,4 +1,10 @@ -2016-04-28 Markus Trippelsdorf <markus@trippelsdorf.de> +2016-04-28 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (zeroing peephole2): Use general_reg_operand. + (or $-1,reg peephole2): Ditto. + (strict_low_part zeroing peephole2): Use SWI12 mode iterator. + +2016-04-28 Markus Trippelsdorf <markus@trippelsdorf.de> * doc/extend.texi (Common Function Attributes) [optimize]: Discourage use of the optimize attribute. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 6befec7..30c0997 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -18124,34 +18124,30 @@ copy_rtx (operands[2])); }) -;; Attempt to always use XOR for zeroing registers. +;; Attempt to always use XOR for zeroing registers (including FP modes). (define_peephole2 - [(set (match_operand 0 "register_operand") + [(set (match_operand 0 "general_reg_operand") (match_operand 1 "const0_operand"))] "GET_MODE_SIZE (GET_MODE (operands[0])) <= UNITS_PER_WORD && (! TARGET_USE_MOV0 || optimize_insn_for_size_p ()) - && GENERAL_REGNO_P (REGNO (operands[0])) && peep2_regno_dead_p (0, FLAGS_REG)" [(parallel [(set (match_dup 0) (const_int 0)) (clobber (reg:CC FLAGS_REG))])] "operands[0] = gen_lowpart (word_mode, operands[0]);") (define_peephole2 - [(set (strict_low_part (match_operand 0 "register_operand")) + [(set (strict_low_part (match_operand:SWI12 0 "general_reg_operand")) (const_int 0))] - "(GET_MODE (operands[0]) == QImode - || GET_MODE (operands[0]) == HImode) - && (! TARGET_USE_MOV0 || optimize_insn_for_size_p ()) + "(! TARGET_USE_MOV0 || optimize_insn_for_size_p ()) && peep2_regno_dead_p (0, FLAGS_REG)" [(parallel [(set (strict_low_part (match_dup 0)) (const_int 0)) (clobber (reg:CC FLAGS_REG))])]) ;; For HI, SI and DI modes, or $-1,reg is smaller than mov $-1,reg. (define_peephole2 - [(set (match_operand:SWI248 0 "register_operand") + [(set (match_operand:SWI248 0 "general_reg_operand") (const_int -1))] - "(optimize_insn_for_size_p () || TARGET_MOVE_M1_VIA_OR) - && GENERAL_REGNO_P (REGNO (operands[0])) + "(TARGET_MOVE_M1_VIA_OR || optimize_insn_for_size_p ()) && peep2_regno_dead_p (0, FLAGS_REG)" [(parallel [(set (match_dup 0) (const_int -1)) (clobber (reg:CC FLAGS_REG))])] |