aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorJan Hubicka <hubicka@gcc.gnu.org>2001-12-14 20:43:41 +0000
committerJan Hubicka <hubicka@gcc.gnu.org>2001-12-14 20:43:41 +0000
commite10e23ee51716833df9ee4642a72f91eff4ff90a (patch)
tree807259ae14faa67af12bdc6ef4a8c045a6903f2c
parentf436562730268adf0b2262f821abbbf3ee05519c (diff)
downloadgcc-e10e23ee51716833df9ee4642a72f91eff4ff90a.zip
gcc-e10e23ee51716833df9ee4642a72f91eff4ff90a.tar.gz
gcc-e10e23ee51716833df9ee4642a72f91eff4ff90a.tar.bz2
config.gcc: Revamp target_cpu_default2 to strings; support new x86 variants.
* config.gcc: Revamp target_cpu_default2 to strings; support new x86 variants. From-SVN: r48007
-rw-r--r--gcc/config.gcc39
1 files changed, 33 insertions, 6 deletions
diff --git a/gcc/config.gcc b/gcc/config.gcc
index a98b7d5..5b3118b 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -3307,28 +3307,55 @@ esac
target_cpu_default2=
case $machine in
i486-*-*)
- target_cpu_default2=1
+ target_cpu_default2=TARGET_CPU_DEFAULT_i486
;;
i586-*-*)
case $target_alias in
+ k6_2-*)
+ target_cpu_default2=TARGET_CPU_DEFAULT_k6_2
+ ;;
+ k6_3-*)
+ target_cpu_default2=TARGET_CPU_DEFAULT_k6_3
+ ;;
k6-*)
- target_cpu_default2=4
+ target_cpu_default2=TARGET_CPU_DEFAULT_k6
+ ;;
+ pentium_mmx-*)
+ target_cpu_default2=TARGET_CPU_DEFAULT_pentium_mmx
;;
*)
- target_cpu_default2=2
+ target_cpu_default2=TARGET_CPU_DEFAULT_pentium
;;
esac
;;
i686-*-* | i786-*-*)
case $target_alias in
- athlon-*)
- target_cpu_default2=5
+ athlon_xp-*|athlon_mp-*|athlon_4-*)
+ target_cpu_default2=TARGET_CPU_DEFAULT_athlon_sse
+ ;;
+ athlon_tbird-*|athlon-*)
+ target_cpu_default2=TARGET_CPU_DEFAULT_athlon
+ ;;
+ pentium2-*)
+ target_cpu_default2=TARGET_CPU_DEFAULT_pentium2
+ ;;
+ pentium3-*)
+ target_cpu_default2=TARGET_CPU_DEFAULT_pentium3
+ ;;
+ pentium4-*)
+ target_cpu_default2=TARGET_CPU_DEFAULT_pentium4
;;
*)
- target_cpu_default2=3
+ target_cpu_default2=TARGET_CPU_DEFAULT_pentiumpro
;;
esac
;;
+x86_64-*-*)
+ # We should have hammer chip here, but it does not exist yet and
+ # thus it is not supported. Athlon_SSE is probably equivalent feature
+ # wise to hammer from our point of view except for 64bit mode.
+ target_cpu_default2=TARGET_CPU_DEFAULT_athlon_sse
+ ;;
alpha*-*-*)
case $machine in
alphaev6[78]*)