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| author | Wilco Dijkstra <wilco.dijkstra@arm.com> | 2022-12-07 14:16:24 +0000 |
|---|---|---|
| committer | Wilco Dijkstra <wilco.dijkstra@arm.com> | 2022-12-07 16:59:07 +0000 |
| commit | 952c8a1dc6235dc49ab207a7f18f63d2bc97fbc9 (patch) | |
| tree | 6a7e5252feda4b23ada0bbd879b9697a285e00b2 | |
| parent | 717154f26b0856bbf19787ffcdfc895b6aa67d4f (diff) | |
| download | gcc-952c8a1dc6235dc49ab207a7f18f63d2bc97fbc9.zip gcc-952c8a1dc6235dc49ab207a7f18f63d2bc97fbc9.tar.gz gcc-952c8a1dc6235dc49ab207a7f18f63d2bc97fbc9.tar.bz2 | |
AArch64: Fix assert in aarch64_move_imm [PR108006]
Ensure we only pass SI/DImode which fixes the assert.
gcc/
PR target/108006
* config/aarch64/aarch64.cc (aarch64_expand_sve_const_vector):
Fix call to aarch64_move_imm to use SI/DI.
| -rw-r--r-- | gcc/config/aarch64/aarch64.cc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc index 89bf0df..27a814d 100644 --- a/gcc/config/aarch64/aarch64.cc +++ b/gcc/config/aarch64/aarch64.cc @@ -6513,7 +6513,8 @@ aarch64_expand_sve_const_vector (rtx target, rtx src) /* If the integer can be moved into a general register by a single instruction, do that and duplicate the result. */ if (CONST_INT_P (elt_value) - && aarch64_move_imm (INTVAL (elt_value), elt_mode)) + && aarch64_move_imm (INTVAL (elt_value), + encoded_bits <= 32 ? SImode : DImode)) { elt_value = force_reg (elt_mode, elt_value); return expand_vector_broadcast (mode, elt_value); |