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| author | Andrew Stubbs <ams@codesourcery.com> | 2020-09-10 10:10:32 +0100 |
|---|---|---|
| committer | Andrew Stubbs <ams@codesourcery.com> | 2020-09-11 10:55:32 +0100 |
| commit | 8ae0de5621120b16295fe6b73ca044d4c576af6d (patch) | |
| tree | bc0346e655274ab0cf77e17d375e9766aa67d1d7 | |
| parent | 054fc495fac5478a119715d10e1dd76442851bb5 (diff) | |
| download | gcc-8ae0de5621120b16295fe6b73ca044d4c576af6d.zip gcc-8ae0de5621120b16295fe6b73ca044d4c576af6d.tar.gz gcc-8ae0de5621120b16295fe6b73ca044d4c576af6d.tar.bz2 | |
amdgcn: align TImode registers
This prevents execution failures caused by partially overlapping input and
output registers. This is the same solution already used for DImode.
gcc/ChangeLog:
* config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align TImode registers.
* config/gcn/gcn.md: Assert that TImode registers do not early clobber.
| -rw-r--r-- | gcc/config/gcn/gcn.c | 3 | ||||
| -rw-r--r-- | gcc/config/gcn/gcn.md | 2 |
2 files changed, 4 insertions, 1 deletions
diff --git a/gcc/config/gcn/gcn.c b/gcc/config/gcn/gcn.c index 8b3c454..84d1fd9 100644 --- a/gcc/config/gcn/gcn.c +++ b/gcc/config/gcn/gcn.c @@ -475,7 +475,8 @@ gcn_hard_regno_mode_ok (unsigned int regno, machine_mode mode) return (vgpr_1reg_mode_p (mode) || (!((regno - FIRST_VGPR_REG) & 1) && vgpr_2reg_mode_p (mode)) /* TImode is used by DImode compare_and_swap. */ - || mode == TImode); + || (mode == TImode + && !((regno - FIRST_VGPR_REG) & 3))); return false; } diff --git a/gcc/config/gcn/gcn.md b/gcc/config/gcn/gcn.md index aeb25fb..0e73fea 100644 --- a/gcc/config/gcn/gcn.md +++ b/gcc/config/gcn/gcn.md @@ -677,6 +677,8 @@ (set (match_dup 4) (match_dup 5)) (set (match_dup 6) (match_dup 7))] { + gcc_assert (rtx_equal_p (operands[0], operands[1]) + || !reg_overlap_mentioned_p (operands[0], operands[1])); operands[6] = gcn_operand_part (TImode, operands[0], 3); operands[7] = gcn_operand_part (TImode, operands[1], 3); operands[4] = gcn_operand_part (TImode, operands[0], 2); |