diff options
| author | Richard Earnshaw <rearnsha@arm.com> | 2015-01-15 18:47:31 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@gcc.gnu.org> | 2015-01-15 18:47:31 +0000 |
| commit | 7c21d0ff8161eef557cbd54d16ded22d8cd51fbd (patch) | |
| tree | 5ff3ac5b1cdd31cdeeb1df1a4402c773492ee7cb | |
| parent | 37767f4f14a572f2fe673f891bf6efef7be0502f (diff) | |
| download | gcc-7c21d0ff8161eef557cbd54d16ded22d8cd51fbd.zip gcc-7c21d0ff8161eef557cbd54d16ded22d8cd51fbd.tar.gz gcc-7c21d0ff8161eef557cbd54d16ded22d8cd51fbd.tar.bz2 | |
arm.c (arm_xgene_tune): Add default initializer for instruction fusion.
* arm.c (arm_xgene_tune): Add default initializer for instruction
fusion.
From-SVN: r219679
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/arm/arm.c | 3 |
2 files changed, 7 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 564074f..b9f2e3d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2015-01-15 Richard Earnshaw <rearnsha@arm.com> + + * arm.c (arm_xgene_tune): Add default initializer for instruction + fusion. + 2015-01-15 Jan Hubicka <hubicka@ucw.cz> PR ipa/64068 diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index a2cce8e..c106843 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -1928,7 +1928,8 @@ const struct tune_params arm_xgene1_tune = false, /* Prefer Neon for 64-bits bitops. */ true, true, /* Prefer 32-bit encodings. */ false, /* Prefer Neon for stringops. */ - 32 /* Maximum insns to inline memset. */ + 32, /* Maximum insns to inline memset. */ + ARM_FUSE_NOTHING /* Fuseable pairs of instructions. */ }; /* Branches can be dual-issued on Cortex-A5, so conditional execution is |