diff options
| author | Alexandre Oliva <oliva@adacore.com> | 2021-12-15 02:22:34 -0300 |
|---|---|---|
| committer | Alexandre Oliva <oliva@gnu.org> | 2021-12-15 02:22:34 -0300 |
| commit | 71cc9b8c39148d19a8043b74ca8b6b4e8b8072ca (patch) | |
| tree | eae49da0f9010557e0fb24287d96ac2441c4df29 | |
| parent | c95a9f1ee7ebd461cbced455271a993bae3a42b6 (diff) | |
| download | gcc-71cc9b8c39148d19a8043b74ca8b6b4e8b8072ca.zip gcc-71cc9b8c39148d19a8043b74ca8b6b4e8b8072ca.tar.gz gcc-71cc9b8c39148d19a8043b74ca8b6b4e8b8072ca.tar.bz2 | |
[PR100518] store by mult pieces: keep addr in Pmode
The conversion of a MEM address to ptr_mode in
try_store_by_multiple_pieces was misguided: copy_addr_to_reg expects
Pmode for addresses.
for gcc/ChangeLog
PR target/100518
* builtins.c (try_store_by_multiple_pieces): Drop address
conversion to ptr_mode.
for gcc/testsuite/ChangeLog
PR target/100518
* gcc.target/aarch64/pr100518.c: New.
| -rw-r--r-- | gcc/builtins.c | 2 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/aarch64/pr100518.c | 9 |
2 files changed, 10 insertions, 1 deletions
diff --git a/gcc/builtins.c b/gcc/builtins.c index 304d87d..cd8947b 100644 --- a/gcc/builtins.c +++ b/gcc/builtins.c @@ -4003,7 +4003,7 @@ try_store_by_multiple_pieces (rtx to, rtx len, unsigned int ctz_len, constfundata = &valc; } - rtx ptr = copy_addr_to_reg (convert_to_mode (ptr_mode, XEXP (to, 0), 0)); + rtx ptr = copy_addr_to_reg (XEXP (to, 0)); rtx rem = copy_to_mode_reg (ptr_mode, convert_to_mode (ptr_mode, len, 0)); to = replace_equiv_address (to, ptr); set_mem_align (to, align); diff --git a/gcc/testsuite/gcc.target/aarch64/pr100518.c b/gcc/testsuite/gcc.target/aarch64/pr100518.c new file mode 100644 index 0000000..5ca599f --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/pr100518.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-mabi=ilp32 -mstrict-align -O2" } */ + +int unsigned_range_min, unsigned_range_max, a11___trans_tmp_1; + +void a11() { + a11___trans_tmp_1 = unsigned_range_max < unsigned_range_min; + __builtin_memset((char *)1, 0, a11___trans_tmp_1); +} |