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author | Christophe Lyon <christophe.lyon@arm.com> | 2023-02-21 21:36:19 +0000 |
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committer | Christophe Lyon <christophe.lyon@arm.com> | 2023-05-11 21:04:09 +0200 |
commit | 42c94ccef896b63cf22509b5d2eb488cdc3ec73c (patch) | |
tree | c39f1a7ea88441ca834d74cf9f9157613a5cabe7 | |
parent | 10a0d98356680a387b69f8659099450f7af86d9f (diff) | |
download | gcc-42c94ccef896b63cf22509b5d2eb488cdc3ec73c.zip gcc-42c94ccef896b63cf22509b5d2eb488cdc3ec73c.tar.gz gcc-42c94ccef896b63cf22509b5d2eb488cdc3ec73c.tar.bz2 |
arm: [MVE intrinsics] factorize vaddlvaq
Factorize vaddlvaq builtins so that they use parameterized names.
2022-10-25 Christophe Lyon <christophe.lyon@arm.com>
gcc/
* config/arm/iterators.md (mve_insn): Add vaddlva.
* config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ...
(@mve_<mve_insn>q_<supf>v4si): ... this.
(mve_vaddlvaq_p_<supf>v4si): Rename into ...
(@mve_<mve_insn>q_p_<supf>v4si): ... this.
-rw-r--r-- | gcc/config/arm/iterators.md | 2 | ||||
-rw-r--r-- | gcc/config/arm/mve.md | 8 |
2 files changed, 6 insertions, 4 deletions
diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index 2f6de93..ff146af 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -759,6 +759,8 @@ (VABDQ_S "vabd") (VABDQ_U "vabd") (VABDQ_F "vabd") (VABSQ_M_F "vabs") (VABSQ_M_S "vabs") + (VADDLVAQ_P_S "vaddlva") (VADDLVAQ_P_U "vaddlva") + (VADDLVAQ_S "vaddlva") (VADDLVAQ_U "vaddlva") (VADDLVQ_P_S "vaddlv") (VADDLVQ_P_U "vaddlv") (VADDLVQ_S "vaddlv") (VADDLVQ_U "vaddlv") (VADDQ_M_N_S "vadd") (VADDQ_M_N_U "vadd") (VADDQ_M_N_F "vadd") diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index f5cb8ef..b548ece 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -1222,7 +1222,7 @@ ;; ;; [vaddlvaq_s vaddlvaq_u]) ;; -(define_insn "mve_vaddlvaq_<supf>v4si" +(define_insn "@mve_<mve_insn>q_<supf>v4si" [ (set (match_operand:DI 0 "s_register_operand" "=r") (unspec:DI [(match_operand:DI 1 "s_register_operand" "0") @@ -1230,7 +1230,7 @@ VADDLVAQ)) ] "TARGET_HAVE_MVE" - "vaddlva.<supf>32\t%Q0, %R0, %q2" + "<mve_insn>.<supf>32\t%Q0, %R0, %q2" [(set_attr "type" "mve_move") ]) @@ -2534,7 +2534,7 @@ ;; ;; [vaddlvaq_p_s vaddlvaq_p_u]) ;; -(define_insn "mve_vaddlvaq_p_<supf>v4si" +(define_insn "@mve_<mve_insn>q_p_<supf>v4si" [ (set (match_operand:DI 0 "s_register_operand" "=r") (unspec:DI [(match_operand:DI 1 "s_register_operand" "0") @@ -2543,7 +2543,7 @@ VADDLVAQ_P)) ] "TARGET_HAVE_MVE" - "vpst\;vaddlvat.<supf>32\t%Q0, %R0, %q2" + "vpst\;<mve_insn>t.<supf>32\t%Q0, %R0, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) ;; |