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author | Carl Love <cel@us.ibm.com> | 2018-02-26 18:13:56 +0000 |
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committer | Carl Love <carll@gcc.gnu.org> | 2018-02-26 18:13:56 +0000 |
commit | 40b864f1411f5cd892ce778e8f38a2ad0f05c388 (patch) | |
tree | c5db6b18ad37de920a65e981fb20d91a20f0adc2 | |
parent | fc4358365865a18f842038e6b57dbd4f0b87709d (diff) | |
download | gcc-40b864f1411f5cd892ce778e8f38a2ad0f05c388.zip gcc-40b864f1411f5cd892ce778e8f38a2ad0f05c388.tar.gz gcc-40b864f1411f5cd892ce778e8f38a2ad0f05c388.tar.bz2 |
builtins-3.c: Move vec_neg builtin tests to Power 8 test file.
gcc/testsuite/ChangeLog:
2018-02-26 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/builtins-3.c: Move vec_neg builtin tests to
Power 8 test file.
* gcc.target/powerpc/builtins-3-p8.c: Add vec_neg builtin tests.
* gcc.target/powerpc/fold-vec-neg-char.c(dg-options): Add -mcpu=power8.
* gcc.target/powerpc/fold-vec-neg-floatdouble.c(dg-options): Add
-mcpu=power8.
* gcc.target/powerpc/fold-vec-neg-int.c(dg-options): Remove file.
* gcc.target/powerpc/fold-vec-neg-short.c(dg-options): Add
-mcpu=power8.
From-SVN: r258006
-rw-r--r-- | gcc/testsuite/ChangeLog | 12 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/builtins-3-p8.c | 43 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/builtins-3.c | 45 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/fold-vec-neg-char.c | 5 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/fold-vec-neg-floatdouble.c | 6 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/fold-vec-neg-short.c | 6 |
6 files changed, 70 insertions, 47 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index bb7a9e9..ba25b2e 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,15 @@ +2018-02-26 Carl Love <cel@us.ibm.com> + + * gcc.target/powerpc/builtins-3.c: Move vec_neg builtin tests to + Power 8 test file. + * gcc.target/powerpc/builtins-3-p8.c: Add vec_neg builtin tests. + * gcc.target/powerpc/fold-vec-neg-char.c(dg-options): Add -mcpu=power8. + * gcc.target/powerpc/fold-vec-neg-floatdouble.c(dg-options): Add + -mcpu=power8. + * gcc.target/powerpc/fold-vec-neg-int.c(dg-options): Remove file. + * gcc.target/powerpc/fold-vec-neg-short.c(dg-options): Add + -mcpu=power8. + 2018-02-26 H.J. Lu <hongjiu.lu@intel.com> PR target/84039 diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-3-p8.c b/gcc/testsuite/gcc.target/powerpc/builtins-3-p8.c index a586805..f7f3107 100644 --- a/gcc/testsuite/gcc.target/powerpc/builtins-3-p8.c +++ b/gcc/testsuite/gcc.target/powerpc/builtins-3-p8.c @@ -180,6 +180,37 @@ test_vull_mulo_vui_vui (vector unsigned int x, vector unsigned int y) return vec_mulo (x, y); } +vector signed char +test_neg_char (vector signed char x) +{ + return vec_neg (x); +} + +vector short +test_neg_short (vector short x) +{ + return vec_neg (x); +} + +vector int +test_neg_int (vector int x) +{ + return vec_neg (x); +} + +vector float +test_neg_float (vector float x) +{ + return vec_neg (x); +} + +vector double +test_neg_double (vector double x) +{ + return vec_neg (x); +} + + /* Expected test results: test_eq_long_long 1 vcmpequd inst @@ -200,6 +231,11 @@ test_vull_mulo_vui_vui (vector unsigned int x, vector unsigned int y) test_vull_mulo_vui_vui 1 vmulouw test_vsll_mule_vsi_vsi 1 vmulesw test_vull_mule_vui_vui 1 vmuleuw + test_neg_char 1 vspltisw, 1 vsububm + test_neg_short 1 vspltisw, 1 vsubuhm + test_neg_int 1 vspltisw, 1 vsubuwm + test_neg_float 1 xvnegsp + test_neg_float 1 xvnegdp */ /* { dg-final { scan-assembler-times "vcmpequd" 1 } } */ @@ -220,3 +256,10 @@ test_vull_mulo_vui_vui (vector unsigned int x, vector unsigned int y) /* { dg-final { scan-assembler-times "vmulouw" 1 } } */ /* { dg-final { scan-assembler-times "vmulesw" 1 } } */ /* { dg-final { scan-assembler-times "vmuleuw" 1 } } */ +/* { dg-final { scan-assembler-times "vspltisw" 3 } } */ +/* { dg-final { scan-assembler-times "vsububm" 1 } } */ +/* { dg-final { scan-assembler-times "vsubuhm" 1 } } */ +/* { dg-final { scan-assembler-times "vsubuwm" 1 } } */ +/* { dg-final { scan-assembler-times "xvnegsp" 1 } } */ +/* { dg-final { scan-assembler-times "xvnegdp" 1 } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-3.c b/gcc/testsuite/gcc.target/powerpc/builtins-3.c index b8a6dcd..0288b80 100644 --- a/gcc/testsuite/gcc.target/powerpc/builtins-3.c +++ b/gcc/testsuite/gcc.target/powerpc/builtins-3.c @@ -60,36 +60,6 @@ test_nabs_double (vector double x) } vector signed char -test_neg_char (vector signed char x) -{ - return vec_neg (x); -} - -vector short -test_neg_short (vector short x) -{ - return vec_neg (x); -} - -vector int -test_neg_int (vector int x) -{ - return vec_neg (x); -} - -vector float -test_neg_float (vector float x) -{ - return vec_neg (x); -} - -vector double -test_neg_double (vector double x) -{ - return vec_neg (x); -} - -vector signed char test_sll_vsc_vsc_vsuc (vector signed char x, vector unsigned char y) { return vec_sll (x, y); @@ -340,11 +310,6 @@ test_cmpb_float (vector float x, vector float y) test_nabs_int 1 vspltisw, 1 vsubuwm, 1 vminsw test_nabs_float 1 xvnabssp test_nabs_double 1 xvnabsdp - test_neg_char 1 vspltisw, 1 vsububm - test_neg_short 1 vspltisw, 1 vsubuhm - test_neg_int 1 vspltisw, 1 vsubuwm - test_neg_float 1 xvnegsp - test_neg_float 1 xvnegdp test_vsll_slo_vsll_vsc 1 vslo test_vsll_slo_vsll_vuc 1 vslo test_vull_slo_vsll_vsc 1 vslo @@ -363,17 +328,15 @@ test_cmpb_float (vector float x, vector float y) /* { dg-final { scan-assembler-times "vcmpequh" 1 } } */ /* { dg-final { scan-assembler-times "vcmpequw" 1 } } */ /* { dg-final { scan-assembler-times "vsldoi" 1 } } */ -/* { dg-final { scan-assembler-times "vsububm" 2 } } */ -/* { dg-final { scan-assembler-times "vsubuhm" 2 } } */ -/* { dg-final { scan-assembler-times "vsubuwm" 2 } } */ +/* { dg-final { scan-assembler-times "vsububm" 1 } } */ +/* { dg-final { scan-assembler-times "vsubuhm" 1 } } */ +/* { dg-final { scan-assembler-times "vsubuwm" 1 } } */ /* { dg-final { scan-assembler-times "vminsb" 1 } } */ /* { dg-final { scan-assembler-times "vminsh" 1 } } */ /* { dg-final { scan-assembler-times "vminsw" 1 } } */ -/* { dg-final { scan-assembler-times "vspltisw" 6 } } */ +/* { dg-final { scan-assembler-times "vspltisw" 3 } } */ /* { dg-final { scan-assembler-times "xvnabssp" 1 } } */ /* { dg-final { scan-assembler-times "xvnabsdp" 1 } } */ -/* { dg-final { scan-assembler-times "xvnegsp" 1 } } */ -/* { dg-final { scan-assembler-times "xvnegdp" 1 } } */ /* { dg-final { scan-assembler-times "vslo" 20 } } */ /* { dg-final { scan-assembler-times "xxsldwi" 8 } } */ /* { dg-final { scan-assembler-times "vcmpbfp" 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-char.c index 19ea3d3..a1ef0e7 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-char.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-char.c @@ -2,8 +2,9 @@ inputs produce the right code. */ /* { dg-do compile } */ -/* { dg-require-effective-target powerpc_altivec_ok } */ -/* { dg-options "-maltivec -O2" } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mvsx -O2 -mcpu=power8" } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-floatdouble.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-floatdouble.c index 79ad924..af09ce6 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-floatdouble.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-floatdouble.c @@ -2,8 +2,10 @@ double inputs for VSX produce the right code. */ /* { dg-do compile } */ -/* { dg-require-effective-target powerpc_vsx_ok } */ -/* { dg-options "-mvsx -O2" } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mvsx -O2 -mcpu=power8" } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ + #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-short.c index 997a9d4..404c160 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-short.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-short.c @@ -2,8 +2,10 @@ inputs produce the right code. */ /* { dg-do compile } */ -/* { dg-require-effective-target powerpc_altivec_ok } */ -/* { dg-options "-maltivec -O2" } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mvsx -O2 -mcpu=power8" } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ + #include <altivec.h> |