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authorJu-Zhe Zhong <juzhe.zhong@rivai.ai>2022-10-11 12:48:20 +0800
committerKito Cheng <kito.cheng@sifive.com>2022-10-12 20:50:51 +0800
commitfcb94f551f29587f04dac0e9b99c98094479835d (patch)
tree66665ed9e03000905041eede7f07512f3df97e1b
parent11c72f20d4d7ba1862a257cef05dc3a5e84a276d (diff)
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RISC-V: Move function place to make it looks better. [NFC]
gcc/ChangeLog: * config/riscv/riscv-vector-builtins.h (class rvv_switcher): Move to this to .... * config/riscv/riscv-vector-builtins.cc (class rvv_switcher): here.
-rw-r--r--gcc/config/riscv/riscv-vector-builtins.cc19
-rw-r--r--gcc/config/riscv/riscv-vector-builtins.h19
2 files changed, 19 insertions, 19 deletions
diff --git a/gcc/config/riscv/riscv-vector-builtins.cc b/gcc/config/riscv/riscv-vector-builtins.cc
index 7033b1f..d523192 100644
--- a/gcc/config/riscv/riscv-vector-builtins.cc
+++ b/gcc/config/riscv/riscv-vector-builtins.cc
@@ -86,6 +86,25 @@ static GTY(()) tree abi_vector_types[NUM_VECTOR_TYPES + 1];
extern GTY(()) tree builtin_vector_types[MAX_TUPLE_SIZE][NUM_VECTOR_TYPES + 1];
tree builtin_vector_types[MAX_TUPLE_SIZE][NUM_VECTOR_TYPES + 1];
+/* RAII class for enabling enough RVV features to define the built-in
+ types and implement the riscv_vector.h pragma.
+
+ Note: According to 'TYPE_MODE' macro implementation, we need set
+ have_regs_of_mode[mode] to be true if we want to get the exact mode
+ from 'TYPE_MODE'. However, have_regs_of_mode has not been set yet in
+ targetm.init_builtins (). We need rvv_switcher to set have_regs_of_mode
+ before targetm.init_builtins () and recover back have_regs_of_mode
+ after targetm.init_builtins (). */
+class rvv_switcher
+{
+public:
+ rvv_switcher ();
+ ~rvv_switcher ();
+
+private:
+ bool m_old_have_regs_of_mode[MAX_MACHINE_MODE];
+};
+
rvv_switcher::rvv_switcher ()
{
/* Set have_regs_of_mode before targetm.init_builtins (). */
diff --git a/gcc/config/riscv/riscv-vector-builtins.h b/gcc/config/riscv/riscv-vector-builtins.h
index ec85e0b..5c01a76 100644
--- a/gcc/config/riscv/riscv-vector-builtins.h
+++ b/gcc/config/riscv/riscv-vector-builtins.h
@@ -36,25 +36,6 @@ enum vector_type_index
NUM_VECTOR_TYPES
};
-/* RAII class for enabling enough RVV features to define the built-in
- types and implement the riscv_vector.h pragma.
-
- Note: According to 'TYPE_MODE' macro implementation, we need set
- have_regs_of_mode[mode] to be true if we want to get the exact mode
- from 'TYPE_MODE'. However, have_regs_of_mode has not been set yet in
- targetm.init_builtins (). We need rvv_switcher to set have_regs_of_mode
- before targetm.init_builtins () and recover back have_regs_of_mode
- after targetm.init_builtins (). */
-class rvv_switcher
-{
-public:
- rvv_switcher ();
- ~rvv_switcher ();
-
-private:
- bool m_old_have_regs_of_mode[MAX_MACHINE_MODE];
-};
-
} // end namespace riscv_vector
#endif