Fix Arm big-endian regressions.

gcc/ChangeLog:

	* config/arm/arm-protos.h (neon_vcmla_lane_prepare_operands): Remove patternmode.
	* config/arm/arm.c (neon_vcmla_lane_prepare_operands): Likewise.
	* config/arm/neon.md (neon_vcmla_lane<rot><mode>, neon_vcmla_laneq<rot><mode>,
	neon_vcmlaq_lane<rot><mode>): Remove endianness conversion.

From-SVN: r267969

4 files changed, 14 insertions, 8 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 17f2195..bfe5b62 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2019-01-16  Tamar Christina  <tamar.christina@arm.com>
+
+	* config/arm/arm-protos.h (neon_vcmla_lane_prepare_operands): Remove patternmode.
+	* config/arm/arm.c (neon_vcmla_lane_prepare_operands): Likewise.
+	* config/arm/neon.md (neon_vcmla_lane<rot><mode>, neon_vcmla_laneq<rot><mode>,
+	neon_vcmlaq_lane<rot><mode>): Remove endianness conversion.
+
 2019-01-16  Martin Liska  <mliska@suse.cz>
 
 	* Makefile.in: Set TOOL_INCLUDE_DIR and NATIVE_SYSTEM_HEADER_DIR
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index 2bc4301..79ede0d 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -109,7 +109,7 @@ extern int arm_coproc_mem_operand (rtx, bool);
 extern int neon_vector_mem_operand (rtx, int, bool);
 extern int neon_struct_mem_operand (rtx);
 
-extern rtx *neon_vcmla_lane_prepare_operands (machine_mode, rtx *);
+extern rtx *neon_vcmla_lane_prepare_operands (rtx *);
 
 extern int tls_mentioned_p (rtx);
 extern int symbol_mentioned_p (rtx);
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index d71ab40..73cb8df 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -12725,8 +12725,7 @@ neon_struct_mem_operand (rtx op)
 /* Prepares the operands for the VCMLA by lane instruction such that the right
    register number is selected.  This instruction is special in that it always
    requires a D register, however there is a choice to be made between Dn[0],
-   Dn[1], D(n+1)[0], and D(n+1)[1] depending on the mode of the registers and
-   the PATTERNMODE of the insn.
+   Dn[1], D(n+1)[0], and D(n+1)[1] depending on the mode of the registers.
 
    The VCMLA by lane function always selects two values. For instance given D0
    and a V2SF, the only valid index is 0 as the values in S0 and S1 will be
@@ -12738,9 +12737,9 @@ neon_struct_mem_operand (rtx op)
    updated to contain the right index.  */
 
 rtx *
-neon_vcmla_lane_prepare_operands (machine_mode patternmode, rtx *operands)
+neon_vcmla_lane_prepare_operands (rtx *operands)
 {
-  int lane = NEON_ENDIAN_LANE_N (patternmode, INTVAL (operands[4]));
+  int lane = INTVAL (operands[4]);
   machine_mode constmode = SImode;
   machine_mode mode = GET_MODE (operands[3]);
   int regno = REGNO (operands[3]);
diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md
index 6f8e7c1..f9d7ba3 100644
--- a/gcc/config/arm/neon.md
+++ b/gcc/config/arm/neon.md
@@ -3494,7 +3494,7 @@
 			     VCMLA)))]
   "TARGET_COMPLEX"
   {
-    operands = neon_vcmla_lane_prepare_operands (<MODE>mode, operands);
+    operands = neon_vcmla_lane_prepare_operands (operands);
     return "vcmla.<V_s_elem>\t%<V_reg>0, %<V_reg>2, d%c3[%c4], #<rot>";
   }
   [(set_attr "type" "neon_fcmla")]
@@ -3509,7 +3509,7 @@
 			      VCMLA)))]
   "TARGET_COMPLEX"
   {
-    operands = neon_vcmla_lane_prepare_operands (<MODE>mode, operands);
+    operands = neon_vcmla_lane_prepare_operands (operands);
     return "vcmla.<V_s_elem>\t%<V_reg>0, %<V_reg>2, d%c3[%c4], #<rot>";
   }
   [(set_attr "type" "neon_fcmla")]
@@ -3524,7 +3524,7 @@
 				 VCMLA)))]
   "TARGET_COMPLEX"
   {
-    operands = neon_vcmla_lane_prepare_operands (<MODE>mode, operands);
+    operands = neon_vcmla_lane_prepare_operands (operands);
     return "vcmla.<V_s_elem>\t%<V_reg>0, %<V_reg>2, d%c3[%c4], #<rot>";
   }
   [(set_attr "type" "neon_fcmla")]