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authorSandra Loosemore <sandra@codesourcery.com>2007-09-05 10:33:48 -0400
committerSandra Loosemore <sandra@gcc.gnu.org>2007-09-05 10:33:48 -0400
commitedede0242fe72bf7814fa25da0ddb6a4dd516738 (patch)
treeedbc99a79858da6dd3a8b15ed4569cd3fa92a054
parentdb2960f402c407aa41fe09d5195da5c414ae79af (diff)
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mips.c (mips_legitimize_tls_address): Call sorry if we encounter TLS address in MIPS16 mode.
2007-09-05 Sandra Loosemore <sandra@codesourcery.com> gcc/ * config/mips/mips.c (mips_legitimize_tls_address): Call sorry if we encounter TLS address in MIPS16 mode. (mips_legitimize_const_move): Check cannot_force_const_mem for the (const (plus symbol offset)) case; this forces invalid TLS address in MIPS16 mode to be caught by the above call to sorry. (override_options): Don't reset targetm.have_tls in MIPS16 mode, because that now enables emutls, which is not ABI compatible with native TLS in non-MIPS16 mode. From-SVN: r128133
-rw-r--r--gcc/ChangeLog12
-rw-r--r--gcc/config/mips/mips.c24
2 files changed, 25 insertions, 11 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index cf58913..b321199 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,17 @@
2007-09-05 Sandra Loosemore <sandra@codesourcery.com>
+ gcc/
+ * config/mips/mips.c (mips_legitimize_tls_address): Call sorry
+ if we encounter TLS address in MIPS16 mode.
+ (mips_legitimize_const_move): Check cannot_force_const_mem for
+ the (const (plus symbol offset)) case; this forces invalid TLS
+ address in MIPS16 mode to be caught by the above call to sorry.
+ (override_options): Don't reset targetm.have_tls in MIPS16 mode,
+ because that now enables emutls, which is not ABI compatible
+ with native TLS in non-MIPS16 mode.
+
+2007-09-05 Sandra Loosemore <sandra@codesourcery.com>
+
Add target hook invoked when cfun changes.
* doc/tm.texi (TARGET_SET_CURRENT_FUNCTION): Document.
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 2c2f11e..937f590 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -2326,6 +2326,12 @@ mips_legitimize_tls_address (rtx loc)
rtx dest, insn, v0, v1, tmp1, tmp2, eqv;
enum tls_model model;
+ if (TARGET_MIPS16)
+ {
+ sorry ("MIPS16 TLS");
+ return gen_reg_rtx (Pmode);
+ }
+
v0 = gen_rtx_REG (Pmode, GP_RETURN);
v1 = gen_rtx_REG (Pmode, GP_RETURN + 1);
@@ -2591,13 +2597,14 @@ mips_legitimize_const_move (enum machine_mode mode, rtx dest, rtx src)
return;
}
- /* If we have (const (plus symbol offset)), load the symbol first
- and then add in the offset. This is usually better than forcing
- the constant into memory, at least in non-mips16 code. */
+ /* If we have (const (plus symbol offset)), and that expression cannot
+ be forced into memory, load the symbol first and add in the offset.
+ In non-MIPS16 mode, prefer to do this even if the constant _can_ be
+ forced into memory, as it usually produces better code. */
split_const (src, &base, &offset);
- if (!TARGET_MIPS16
- && offset != const0_rtx
- && (can_create_pseudo_p () || SMALL_INT (offset)))
+ if (offset != const0_rtx
+ && (targetm.cannot_force_const_mem (src)
+ || (!TARGET_MIPS16 && can_create_pseudo_p ())))
{
base = mips_force_temporary (dest, base);
mips_emit_move (dest, mips_add_offset (0, base, INTVAL (offset)));
@@ -5600,11 +5607,6 @@ override_options (void)
mips_lo_relocs[SYMBOL_HALF] = "%half(";
- /* We don't have a thread pointer access instruction on MIPS16, or
- appropriate TLS relocations. */
- if (TARGET_MIPS16)
- targetm.have_tls = false;
-
/* Default to working around R4000 errata only if the processor
was selected explicitly. */
if ((target_flags_explicit & MASK_FIX_R4000) == 0