(extendsfdf2): Undo 30 Nov 94 change.

(extendsfdf2): Undo 30 Nov 94 change.  Use float_extend instead of
SUBREG and restore fmr instruction for differing FPRs.

From-SVN: r8923

1 files changed, 10 insertions, 22 deletions

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 0593a1b..23279e7 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -1,5 +1,5 @@
 ;; Machine description for IBM RISC System 6000 (POWER) for GNU C compiler
-;; Copyright (C) 1990, 1991, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
+;; Copyright (C) 1990, 91, 92, 93, 94, 1995 Free Software Foundation, Inc.
 ;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
 
 ;; This file is part of GNU CC.
@@ -2500,10 +2500,6 @@
 ;; The only conversions we will do will be when storing to memory.  In that
 ;; case, we will use the "frsp" instruction before storing.
 ;;
-;; SFmode values are stored in DFmode registers with the same format as
-;; DFmode values, so float_extend is a no-op: treat as paradoxical subreg
-;; using define_expand and define_split if made by combine.
-;;
 ;; Note that when we store into a single-precision memory location, we need to
 ;; use the frsp insn first.  If the register being stored isn't dead, we
 ;; need a scratch register for the frsp.  But this is difficult when the store
@@ -2511,26 +2507,18 @@
 ;; this case, we just lose precision that we would have otherwise gotten but
 ;; is not guaranteed.  Perhaps this should be tightened up at some point.
 
-(define_expand "extendsfdf2"
+(define_insn "extendsfdf2"
   [(set (match_operand:DF 0 "gpc_reg_operand" "=f")
-	(match_operand:SF 1 "gpc_reg_operand" "f"))]
+	(float_extend:DF (match_operand:SF 1 "gpc_reg_operand" "f")))]
   ""
-  "
-{
-  if (GET_CODE (operands[1]) == SUBREG)
-     operands[1] = force_reg (SFmode, operands[1]);
-  operands[1] = gen_rtx (SUBREG, DFmode, operands[1], 0);
-}")
-
-(define_split
-  [(set (match_operand:DF 0 "gpc_reg_operand" "")
-	(float_extend:DF (match_operand:SF 1 "gpc_reg_operand" "")))]
-  "GET_CODE (operands[1]) != SUBREG"
-  [(set (match_dup 0) (match_dup 1))]
-  "
+  "*
 {
-  operands[1] = gen_rtx (SUBREG, DFmode, operands[1], 0);
-}")
+  if (REGNO (operands[0]) == REGNO (operands[1]))
+    return \"\";
+  else
+    return \"fmr %0,%1\";
+}"
+  [(set_attr "type" "fp")])
 
 (define_insn "truncdfsf2"
   [(set (match_operand:SF 0 "gpc_reg_operand" "=f")