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| author | Richard Biener <rguenther@suse.de> | 2023-02-09 13:40:43 +0100 |
|---|---|---|
| committer | Richard Biener <rguenther@suse.de> | 2023-02-15 08:28:08 +0100 |
| commit | e1dfac7e71056e879f101fef1c5ecb8ff6be1a1f (patch) | |
| tree | d0da64355f5c3ddaa408ccbdbf097d7404fcae09 | |
| parent | ec23e9e25eb64bb066dc408fd498861b8587bec8 (diff) | |
| download | gcc-e1dfac7e71056e879f101fef1c5ecb8ff6be1a1f.zip gcc-e1dfac7e71056e879f101fef1c5ecb8ff6be1a1f.tar.gz gcc-e1dfac7e71056e879f101fef1c5ecb8ff6be1a1f.tar.bz2 | |
target/108738 - optimize bit operations in STV
The following does low-hanging optimizations, combining bitmap
test and set and removing redundant operations.
PR target/108738
* config/i386/i386-features.cc (scalar_chain::add_to_queue):
Combine bitmap test and set.
(scalar_chain::add_insn): Likewise.
(scalar_chain::analyze_register_chain): Remove redundant
attempt to add to queue and instead strengthen assert.
Sink common attempts to mark the def dual-mode.
(scalar_chain::add_to_queue): Remove redundant insn bitmap
check.
| -rw-r--r-- | gcc/config/i386/i386-features.cc | 18 |
1 files changed, 8 insertions, 10 deletions
diff --git a/gcc/config/i386/i386-features.cc b/gcc/config/i386/i386-features.cc index 9bd6d86..eff9130 100644 --- a/gcc/config/i386/i386-features.cc +++ b/gcc/config/i386/i386-features.cc @@ -314,14 +314,12 @@ scalar_chain::~scalar_chain () void scalar_chain::add_to_queue (unsigned insn_uid) { - if (bitmap_bit_p (insns, insn_uid) - || bitmap_bit_p (queue, insn_uid)) + if (!bitmap_set_bit (queue, insn_uid)) return; if (dump_file) fprintf (dump_file, " Adding insn %d into chain's #%d queue\n", insn_uid, chain_id); - bitmap_set_bit (queue, insn_uid); } /* For DImode conversion, mark register defined by DEF as requiring @@ -362,10 +360,9 @@ void scalar_chain::analyze_register_chain (bitmap candidates, df_ref ref) { df_link *chain; + bool mark_def = false; - gcc_assert (bitmap_bit_p (insns, DF_REF_INSN_UID (ref)) - || bitmap_bit_p (candidates, DF_REF_INSN_UID (ref))); - add_to_queue (DF_REF_INSN_UID (ref)); + gcc_checking_assert (bitmap_bit_p (insns, DF_REF_INSN_UID (ref))); for (chain = DF_REF_CHAIN (ref); chain; chain = chain->next) { @@ -398,9 +395,12 @@ scalar_chain::analyze_register_chain (bitmap candidates, df_ref ref) if (dump_file) fprintf (dump_file, " r%d use in insn %d isn't convertible\n", DF_REF_REGNO (chain->ref), uid); - mark_dual_mode_def (ref); + mark_def = true; } } + + if (mark_def) + mark_dual_mode_def (ref); } /* Add instruction into a chain. */ @@ -408,14 +408,12 @@ scalar_chain::analyze_register_chain (bitmap candidates, df_ref ref) void scalar_chain::add_insn (bitmap candidates, unsigned int insn_uid) { - if (bitmap_bit_p (insns, insn_uid)) + if (!bitmap_set_bit (insns, insn_uid)) return; if (dump_file) fprintf (dump_file, " Adding insn %d to chain #%d\n", insn_uid, chain_id); - bitmap_set_bit (insns, insn_uid); - rtx_insn *insn = DF_INSN_UID_GET (insn_uid)->insn; rtx def_set = single_set (insn); if (def_set && REG_P (SET_DEST (def_set)) |