diff options
author | Pan Li <pan2.li@intel.com> | 2024-04-12 11:12:24 +0800 |
---|---|---|
committer | Pan Li <pan2.li@intel.com> | 2024-04-12 14:17:05 +0800 |
commit | dc51a6428f6d8e5a57b8b1bf559145288e87660b (patch) | |
tree | 1f618cb9e2bb0da5302df3835fbc1e93e1a1bbf2 | |
parent | d1a21a6f9474e519926d20a7c6d664be03aff3ee (diff) | |
download | gcc-dc51a6428f6d8e5a57b8b1bf559145288e87660b.zip gcc-dc51a6428f6d8e5a57b8b1bf559145288e87660b.tar.gz gcc-dc51a6428f6d8e5a57b8b1bf559145288e87660b.tar.bz2 |
RISC-V: Bugfix ICE non-vector in TARGET_FUNCTION_VALUE_REGNO_P
This patch would like to fix one ICE when vector is not enabled
in hook TARGET_FUNCTION_VALUE_REGNO_P implementation. The vector
regno is available if and only if the TARGET_VECTOR is true. The
previous implement missed this condition and then result in ICE
when rv64gc build option without vector.
The below test suite is passed for this patch.
* The rv64gcv fully regression tests.
* The rv64gc fully regression tests.
PR target/114639
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_function_value_regno_p): Add
TARGET_VECTOR predicate for V_RETURN regno.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/pr114639-1.c: New test.
* gcc.target/riscv/pr114639-2.c: New test.
* gcc.target/riscv/pr114639-3.c: New test.
* gcc.target/riscv/pr114639-4.c: New test.
Signed-off-by: Pan Li <pan2.li@intel.com>
-rw-r--r-- | gcc/config/riscv/riscv.cc | 2 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/riscv/pr114639-1.c | 11 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/riscv/pr114639-2.c | 11 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/riscv/pr114639-3.c | 11 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/riscv/pr114639-4.c | 11 |
5 files changed, 45 insertions, 1 deletions
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 91f017d..e5f0080 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -11008,7 +11008,7 @@ riscv_function_value_regno_p (const unsigned regno) if (FP_RETURN_FIRST <= regno && regno <= FP_RETURN_LAST) return true; - if (regno == V_RETURN) + if (TARGET_VECTOR && regno == V_RETURN) return true; return false; diff --git a/gcc/testsuite/gcc.target/riscv/pr114639-1.c b/gcc/testsuite/gcc.target/riscv/pr114639-1.c new file mode 100644 index 0000000..f417231 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/pr114639-1.c @@ -0,0 +1,11 @@ +/* Test that we do not have ice when compile */ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -std=gnu89 -O3" } */ + +g (a, b) {} + +f (xx) + void* xx; +{ + __builtin_apply ((void*)g, xx, 200); +} diff --git a/gcc/testsuite/gcc.target/riscv/pr114639-2.c b/gcc/testsuite/gcc.target/riscv/pr114639-2.c new file mode 100644 index 0000000..0c402c4 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/pr114639-2.c @@ -0,0 +1,11 @@ +/* Test that we do not have ice when compile */ +/* { dg-do compile } */ +/* { dg-options "-march=rv64imac -mabi=lp64 -std=gnu89 -O3" } */ + +g (a, b) {} + +f (xx) + void* xx; +{ + __builtin_apply ((void*)g, xx, 200); +} diff --git a/gcc/testsuite/gcc.target/riscv/pr114639-3.c b/gcc/testsuite/gcc.target/riscv/pr114639-3.c new file mode 100644 index 0000000..ffb0d6d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/pr114639-3.c @@ -0,0 +1,11 @@ +/* Test that we do not have ice when compile */ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gc -mabi=ilp32d -std=gnu89 -O3" } */ + +g (a, b) {} + +f (xx) + void* xx; +{ + __builtin_apply ((void*)g, xx, 200); +} diff --git a/gcc/testsuite/gcc.target/riscv/pr114639-4.c b/gcc/testsuite/gcc.target/riscv/pr114639-4.c new file mode 100644 index 0000000..a6e2291 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/pr114639-4.c @@ -0,0 +1,11 @@ +/* Test that we do not have ice when compile */ +/* { dg-do compile } */ +/* { dg-options "-march=rv32imac -mabi=ilp32 -std=gnu89 -O3" } */ + +g (a, b) {} + +f (xx) + void* xx; +{ + __builtin_apply ((void*)g, xx, 200); +} |