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| author | H.J. Lu <hongjiu.lu@intel.com> | 2015-10-01 13:34:49 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl@gcc.gnu.org> | 2015-10-01 06:34:49 -0700 |
| commit | d878e79bf80f4c7bb0c6dd827e4c4dd37c5385bf (patch) | |
| tree | 6641090b9949146335dc9de1f12288dbcd19d8e6 | |
| parent | 91470073d66655e793ba3c797cbf2d156644f165 (diff) | |
| download | gcc-d878e79bf80f4c7bb0c6dd827e4c4dd37c5385bf.zip gcc-d878e79bf80f4c7bb0c6dd827e4c4dd37c5385bf.tar.gz gcc-d878e79bf80f4c7bb0c6dd827e4c4dd37c5385bf.tar.bz2 | |
Enable bt and and movzx for Lakemont
* config/i386/x86-tune.def (X86_TUNE_USE_BT): Enable for
Lakemont.
(X86_TUNE_ZERO_EXTEND_WITH_AND): Disable for Lakemont.
From-SVN: r228337
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/i386/x86-tune.def | 4 |
2 files changed, 8 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2d86889..70f9646 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2015-10-01 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/x86-tune.def (X86_TUNE_USE_BT): Enable for + Lakemont. + (X86_TUNE_ZERO_EXTEND_WITH_AND): Disable for Lakemont. + 2015-10-01 James Greenhalgh <james.greenhalgh@arm.com> * config/arm/aarch-common-protos.h diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def index 3b3f149..213c604 100644 --- a/gcc/config/i386/x86-tune.def +++ b/gcc/config/i386/x86-tune.def @@ -292,7 +292,7 @@ DEF_TUNE (X86_TUNE_USE_CLTD, "use_cltd", /* X86_TUNE_USE_BT: Enable use of BT (bit test) instructions. */ DEF_TUNE (X86_TUNE_USE_BT, "use_bt", m_CORE_ALL | m_BONNELL | m_SILVERMONT | m_KNL | m_INTEL - | m_AMD_MULTIPLE | m_GENERIC) + | m_LAKEMONT | m_AMD_MULTIPLE | m_GENERIC) /*****************************************************************************/ /* 387 instruction selection tuning */ @@ -448,7 +448,7 @@ DEF_TUNE (X86_TUNE_SHIFT1, "shift1", ~m_486) /* X86_TUNE_ZERO_EXTEND_WITH_AND: Use AND instruction instead of mozbl/movwl. */ DEF_TUNE (X86_TUNE_ZERO_EXTEND_WITH_AND, "zero_extend_with_and", - m_486 | m_PENT | m_LAKEMONT) + m_486 | m_PENT) /* X86_TUNE_PROMOTE_HIMODE_IMUL: Modern CPUs have same latency for HImode and SImode multiply, but 386 and 486 do HImode multiply faster. */ |