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author | Andrew Pinski <apinski@cavium.com> | 2015-01-13 13:55:23 +0000 |
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committer | Andrew Pinski <pinskia@gcc.gnu.org> | 2015-01-13 05:55:23 -0800 |
commit | bf84ac44f9679285d95ac0c96c0e2e83b7ef038f (patch) | |
tree | 72d0176b51caf8fb006310c09a11bc0a61bd61fc | |
parent | 08cb0abc7c107f5114ad1fb6b35bc8402b4cc589 (diff) | |
download | gcc-bf84ac44f9679285d95ac0c96c0e2e83b7ef038f.zip gcc-bf84ac44f9679285d95ac0c96c0e2e83b7ef038f.tar.gz gcc-bf84ac44f9679285d95ac0c96c0e2e83b7ef038f.tar.bz2 |
[multiple changes]
2015-01-13 Andrew Pinski <apinski@cavium.com>
* config/aarch64/aarch64.c (aarch64_operands_ok_for_ldpstp): Reject
volatile mems.
(aarch64_operands_adjust_ok_for_ldpstp): Likewise.
2015-01-13 Andrew Pinski <apinski@cavium.com>
* gcc.target/aarch64/volatileloadpair-1.c: New testcase.
* gcc.target/aarch64/volatileloadpair-2.c: New testcase.
From-SVN: r219530
-rw-r--r-- | gcc/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/config/aarch64/aarch64.c | 9 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/volatileloadpair-1.c | 46 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/volatileloadpair-2.c | 49 |
5 files changed, 115 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4d9809b..2b1449b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2015-01-13 Andrew Pinski <apinski@cavium.com> + + * config/aarch64/aarch64.c (aarch64_operands_ok_for_ldpstp): Reject + volatile mems. + (aarch64_operands_adjust_ok_for_ldpstp): Likewise. + 2015-01-13 Jakub Jelinek <jakub@redhat.com> PR middle-end/63974 diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 5100532..3b6c67a 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -10630,6 +10630,10 @@ aarch64_operands_ok_for_ldpstp (rtx *operands, bool load, reg_2 = operands[3]; } + /* The mems cannot be volatile. */ + if (MEM_VOLATILE_P (mem_1) || MEM_VOLATILE_P (mem_2)) + return false; + /* Check if the addresses are in the form of [base+offset]. */ extract_base_offset_in_addr (mem_1, &base_1, &offset_1); if (base_1 == NULL_RTX || offset_1 == NULL_RTX) @@ -10737,6 +10741,11 @@ aarch64_operands_adjust_ok_for_ldpstp (rtx *operands, bool load, if (!MEM_P (mem_1) || aarch64_mem_pair_operand (mem_1, mode)) return false; + /* The mems cannot be volatile. */ + if (MEM_VOLATILE_P (mem_1) || MEM_VOLATILE_P (mem_2) + || MEM_VOLATILE_P (mem_3) ||MEM_VOLATILE_P (mem_4)) + return false; + /* Check if the addresses are in the form of [base+offset]. */ extract_base_offset_in_addr (mem_1, &base_1, &offset_1); if (base_1 == NULL_RTX || offset_1 == NULL_RTX) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 819a122..8a5a62e 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-01-13 Andrew Pinski <apinski@cavium.com> + + * gcc.target/aarch64/volatileloadpair-1.c: New testcase. + * gcc.target/aarch64/volatileloadpair-2.c: New testcase. + 2015-01-13 Richard Biener <rguenther@suse.de> PR tree-optimization/64406 diff --git a/gcc/testsuite/gcc.target/aarch64/volatileloadpair-1.c b/gcc/testsuite/gcc.target/aarch64/volatileloadpair-1.c new file mode 100644 index 0000000..76162a5 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/volatileloadpair-1.c @@ -0,0 +1,46 @@ +/* { dg-do compile } */ +/* { dg-do options "-O2" } */ +/* volatile references should not produce load pair. */ +/* { dg-final { scan-assembler-not "ldp\t" } } */ + +int f0(volatile int *a) +{ + int b = a[0]; + int c = a[1]; + return b + c; +} + +int f1(volatile int *a) +{ + int b = a[1]; + int c = a[0]; + return b + c; +} + +int f2(volatile int *a) +{ + int b = a[1]; + int c = a[2]; + return b + c; +} + +int f3(volatile int *a) +{ + int b = a[2]; + int c = a[1]; + return b + c; +} + +int f4(volatile int *a) +{ + int b = a[2]; + int c = a[3]; + return b + c; +} + +int f5(volatile int *a) +{ + int b = a[3]; + int c = a[2]; + return b + c; +} diff --git a/gcc/testsuite/gcc.target/aarch64/volatileloadpair-2.c b/gcc/testsuite/gcc.target/aarch64/volatileloadpair-2.c new file mode 100644 index 0000000..133bda2 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/volatileloadpair-2.c @@ -0,0 +1,49 @@ +/* { dg-do compile } */ +/* { dg-do options "-O2" } */ +/* volatile references should not produce load pair. */ +/* { dg-final { scan-assembler-not "ldp\t" } } */ + +int f0(volatile int *a) +{ + int b = a[0]; + int c = a[1]; + int d = a[2]; + int e = a[3]; + return b + c + d + e; +} + +int f1(volatile int *a) +{ + int b = a[1]; + int c = a[0]; + int d = a[2]; + int e = a[3]; + return b + c + d + e; +} + +int f2(volatile int *a) +{ + int b = a[1]; + int c = a[0]; + int d = a[3]; + int e = a[2]; + return b + c + d + e; +} + +int f3(volatile int *a) +{ + int b = a[1]; + int c = a[3]; + int d = a[0]; + int e = a[2]; + return b + c + d + e; +} + +int f4(volatile int *a) +{ + int b = a[1]; + int c = a[3]; + int d = a[2]; + int e = a[0]; + return b + c + d + e; +} |