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| author | Vladimir N. Makarov <vmakarov@redhat.com> | 2023-12-21 09:37:20 -0500 |
|---|---|---|
| committer | Vladimir N. Makarov <vmakarov@redhat.com> | 2023-12-21 09:38:43 -0500 |
| commit | be977db17c91ad6627dee70a1904a95d229aa1be (patch) | |
| tree | 93f05499b3ec4f2e93f7e1498fcc8ef83fc4abdc | |
| parent | 144c531fe25483b65ad3189d7b5e9f78154477c2 (diff) | |
| download | gcc-be977db17c91ad6627dee70a1904a95d229aa1be.zip gcc-be977db17c91ad6627dee70a1904a95d229aa1be.tar.gz gcc-be977db17c91ad6627dee70a1904a95d229aa1be.tar.bz2 | |
Revert "[PR112918][LRA]: Fixing IRA ICE on m68k"
This reverts commit 989e67f827b74b76e58abe137ce12d948af2290c.
| -rw-r--r-- | gcc/lra-constraints.cc | 26 |
1 files changed, 11 insertions, 15 deletions
diff --git a/gcc/lra-constraints.cc b/gcc/lra-constraints.cc index 05479ab..da7e174 100644 --- a/gcc/lra-constraints.cc +++ b/gcc/lra-constraints.cc @@ -261,13 +261,6 @@ enough_allocatable_hard_regs_p (enum reg_class reg_class, return false; } -/* True if C is a non-empty register class that has too few registers - to be safely used as a reload target class. */ -#define SMALL_REGISTER_CLASS_P(C) \ - (ira_class_hard_regs_num [(C)] == 1 \ - || (ira_class_hard_regs_num [(C)] >= 1 \ - && targetm.class_likely_spilled_p (C))) - /* Return true if REG satisfies (or will satisfy) reg class constraint CL. Use elimination first if REG is a hard register. If REG is a reload pseudo created by this constraints pass, assume that it will @@ -325,11 +318,7 @@ in_class_p (rtx reg, enum reg_class cl, enum reg_class *new_class, common_class = ira_reg_class_subset[rclass][cl]; if (new_class != NULL) *new_class = common_class; - return (enough_allocatable_hard_regs_p (common_class, reg_mode) - /* Do not permit reload insn operand matching (new_class == NULL - case) if the new class is too small. */ - && (new_class != NULL || common_class == rclass - || !SMALL_REGISTER_CLASS_P (common_class))); + return enough_allocatable_hard_regs_p (common_class, reg_mode); } } @@ -934,6 +923,13 @@ operands_match_p (rtx x, rtx y, int y_hard_regno) && GET_MODE_SIZE (MODE).is_constant () \ && !targetm.cannot_force_const_mem (MODE, X)) +/* True if C is a non-empty register class that has too few registers + to be safely used as a reload target class. */ +#define SMALL_REGISTER_CLASS_P(C) \ + (ira_class_hard_regs_num [(C)] == 1 \ + || (ira_class_hard_regs_num [(C)] >= 1 \ + && targetm.class_likely_spilled_p (C))) + /* If REG is a reload pseudo, try to make its class satisfying CL. */ static void narrow_reload_pseudo_class (rtx reg, enum reg_class cl) @@ -2635,7 +2631,7 @@ process_alt_operands (int only_alternative) hard_regno[nop])))) win = true; else if (hard_regno[nop] < 0 - && in_class_p (op, this_alternative, NULL, true)) + && in_class_p (op, this_alternative, NULL)) win = true; } break; @@ -2679,7 +2675,7 @@ process_alt_operands (int only_alternative) reject++; } if (in_class_p (operand_reg[nop], - this_costly_alternative, NULL, true)) + this_costly_alternative, NULL)) { if (lra_dump_file != NULL) fprintf @@ -4392,7 +4388,7 @@ curr_insn_transform (bool check_only_p) if (REG_P (reg) && (regno = REGNO (reg)) >= FIRST_PSEUDO_REGISTER) { - bool ok_p = in_class_p (reg, goal_alt[i], &new_class, true); + bool ok_p = in_class_p (reg, goal_alt[i], &new_class); if (new_class != NO_REGS && get_reg_class (regno) != new_class) { |