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| author | James Van Artsdalen <jrv@gnu.org> | 1992-03-03 19:42:18 +0000 |
|---|---|---|
| committer | James Van Artsdalen <jrv@gnu.org> | 1992-03-03 19:42:18 +0000 |
| commit | ab408a8674e078f1d6abfd902630ac8cb3d0fc05 (patch) | |
| tree | 5c1c1d841ef9fa455867fd72889d390a7eca900d | |
| parent | 412dc3482fd83f919a5ad96656ecf5df6c18d20d (diff) | |
| download | gcc-ab408a8674e078f1d6abfd902630ac8cb3d0fc05.zip gcc-ab408a8674e078f1d6abfd902630ac8cb3d0fc05.tar.gz gcc-ab408a8674e078f1d6abfd902630ac8cb3d0fc05.tar.bz2 | |
*** empty log message ***
From-SVN: r381
| -rw-r--r-- | gcc/config/i386/i386.c | 2 | ||||
| -rw-r--r-- | gcc/config/i386/i386.h | 14 |
2 files changed, 10 insertions, 6 deletions
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index cd81f699..6aed00d 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -49,7 +49,7 @@ static char *qi_high_reg_name[] = QI_HIGH_REGISTER_NAMES; enum reg_class regclass_map[FIRST_PSEUDO_REGISTER] = { /* ax, dx, cx, bx */ - AREG, DREG, CREG, Q_REGS, + AREG, DREG, CREG, BREG, /* si, di, bp, sp */ SIREG, DIREG, INDEX_REGS, GENERAL_REGS, /* FP registers */ diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index c0cd287..e24cbd1 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -309,13 +309,16 @@ extern int target_flags; in a smaller-numbered class. For any two classes, it is very desirable that there be another - class that represents their union. */ - + class that represents their union. + + It might seem that class BREG is unnecessary, since no useful 386 + opcode needs reg %ebx. But some systems pass args to the OS in ebx, + and the "b" register constraint is useful in asms for syscalls. */ enum reg_class { NO_REGS, - AREG, DREG, CREG, + AREG, DREG, CREG, BREG, Q_REGS, /* %eax %ebx %ecx %edx */ SIREG, DIREG, INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */ @@ -331,7 +334,7 @@ enum reg_class #define REG_CLASS_NAMES \ { "NO_REGS", \ - "AREG", "DREG", "CREG", \ + "AREG", "DREG", "CREG", "BREG", \ "Q_REGS", \ "SIREG", "DIREG", \ "INDEX_REGS", \ @@ -346,7 +349,7 @@ enum reg_class #define REG_CLASS_CONTENTS \ { 0, \ - 0x1, 0x2, 0x4, /* AREG, DREG, CREG */ \ + 0x1, 0x2, 0x4, 0x8, /* AREG, DREG, CREG, BREG */ \ 0xf, /* Q_REGS */ \ 0x10, 0x20, /* SIREG, DIREG */ \ 0x1007f, /* INDEX_REGS */ \ @@ -409,6 +412,7 @@ extern enum reg_class regclass_map[FIRST_PSEUDO_REGISTER]; (C) == 't' ? FP_TOP_REG : \ (C) == 'u' ? FP_SECOND_REG : \ (C) == 'a' ? AREG : \ + (C) == 'b' ? BREG : \ (C) == 'c' ? CREG : \ (C) == 'd' ? DREG : \ (C) == 'D' ? DIREG : \ |