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author | Uros Bizjak <ubizjak@gmail.com> | 2015-07-18 11:50:37 +0200 |
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committer | Uros Bizjak <uros@gcc.gnu.org> | 2015-07-18 11:50:37 +0200 |
commit | ab22883b701867cefe872dcd6942ebdf2e84db32 (patch) | |
tree | 7d4f831584734fe895030a29d6445f001e97afdb | |
parent | 49b8fe6c1a585edfeb5dd0f292e05a167f475f68 (diff) | |
download | gcc-ab22883b701867cefe872dcd6942ebdf2e84db32.zip gcc-ab22883b701867cefe872dcd6942ebdf2e84db32.tar.gz gcc-ab22883b701867cefe872dcd6942ebdf2e84db32.tar.bz2 |
re PR target/66922 (wrong code for bit-field struct at -O1 and above on x86_64-linux-gnu)
PR target/66922
* config/i386/i386.c (ix86_expand_pextr): Reject extractions
from misaligned positions.
(ix86_expand_pinsr): Reject insertions to misaligned positions.
testsuite/ChangeLog:
PR target/66922
* gcc.target/i386/pr66922.c: New test.
From-SVN: r225980
-rw-r--r-- | gcc/ChangeLog | 7 | ||||
-rw-r--r-- | gcc/config/i386/i386.c | 8 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/i386/pr66922.c | 23 |
4 files changed, 43 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 98fb37b..095713d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2015-07-18 Uros Bizjak <ubizjak@gmail.com> + + PR target/66922 + * config/i386/i386.c (ix86_expand_pextr): Reject extractions + from misaligned positions. + (ix86_expand_pinsr): Reject insertions to misaligned positions. + 2015-07-18 Sebastian Pop <s.pop@samsung.com> PR middle-end/46851 diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 01a1cb9..7901a4f 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -50591,6 +50591,10 @@ ix86_expand_pextr (rtx *operands) return false; } + /* Reject extractions from misaligned positions. */ + if (pos & (size-1)) + return false; + if (GET_MODE (dst) == dstmode) d = dst; else @@ -50687,6 +50691,10 @@ ix86_expand_pinsr (rtx *operands) return false; } + /* Reject insertions to misaligned positions. */ + if (pos & (size-1)) + return false; + if (GET_CODE (src) == SUBREG) { unsigned int srcpos = SUBREG_BYTE (src); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index a9b34ba..214ad67 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-07-18 Uros Bizjak <ubizjak@gmail.com> + + PR target/66922 + * gcc.target/i386/pr66922.c: New test. + 2015-07-18 Sebastian Pop <s.pop@samsung.com> PR middle-end/46851 diff --git a/gcc/testsuite/gcc.target/i386/pr66922.c b/gcc/testsuite/gcc.target/i386/pr66922.c new file mode 100644 index 0000000..46274b2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr66922.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-options "-O1 -msse2" } */ +/* { dg-require-effective-target sse2 } */ + +#include "sse2-check.h" + +struct S +{ + int:31; + int:2; + int f0:16; + int f1; + int f2; +}; + +static void +sse2_test (void) +{ + struct S a = { 1, 0, 0 }; + + if (a.f0 != 1) + __builtin_abort(); +} |