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| author | Andreas Krebbel <krebbel@linux.vnet.ibm.com> | 2016-05-10 09:00:53 +0000 |
|---|---|---|
| committer | Andreas Krebbel <krebbel@gcc.gnu.org> | 2016-05-10 09:00:53 +0000 |
| commit | a579871bbcf4d290a5bd44b655ecf5de2ff399bc (patch) | |
| tree | 9e4060cc9f5d3002477bf29257f4697884839017 | |
| parent | 64ea4e151b40fde37eb2b3190731f03c4a65dcf3 (diff) | |
| download | gcc-a579871bbcf4d290a5bd44b655ecf5de2ff399bc.zip gcc-a579871bbcf4d290a5bd44b655ecf5de2ff399bc.tar.gz gcc-a579871bbcf4d290a5bd44b655ecf5de2ff399bc.tar.bz2 | |
S/390: Disable scalar vector instructions with -mno-vx.
Although the scalar variants of the vector instructions aren't
actually vector instructions they are still executed in the vector
facility and therefore need to be disabled when disabling the facility
with -mno-vx.
Fixed with the attached patch. Committed to head, GCC 6, and GCC 5
branches.
gcc/ChangeLog:
2016-05-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.md ("*vec_cmp<insn_cmp>df_cconly")
("*fixuns_truncdfdi2_z13")
("*fixuns_trunc<FP:mode><GPR:mode>2_z196")
("*fix_truncdfdi2_bfp_z13", "*floatunsdidf2_z13")
("*extendsfdf2_z13"): Replace TARGET_Z13 with TARGET_VX.
From-SVN: r236067
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/s390/s390.md | 12 |
2 files changed, 14 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2365d85..2093050 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2016-05-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com> + + * config/s390/s390.md ("*vec_cmp<insn_cmp>df_cconly") + ("*fixuns_truncdfdi2_z13") + ("*fixuns_trunc<FP:mode><GPR:mode>2_z196") + ("*fix_truncdfdi2_bfp_z13", "*floatunsdidf2_z13") + ("*extendsfdf2_z13"): Replace TARGET_Z13 with TARGET_VX. + 2016-05-10 Richard Biener <rguenther@suse.de> PR tree-optimization/70497 diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index faaa7f3..caf8ed5 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -1305,7 +1305,7 @@ (compare:VFCMP (match_operand:DF 0 "register_operand" "v") (match_operand:DF 1 "register_operand" "v"))) (clobber (match_scratch:V2DI 2 "=v"))] - "TARGET_Z13 && TARGET_HARD_FLOAT" + "TARGET_VX && TARGET_HARD_FLOAT" "wfc<asm_fcmp>dbs\t%v2,%v0,%v1" [(set_attr "op_type" "VRR")]) @@ -4703,7 +4703,7 @@ (unsigned_fix:DI (match_operand:DF 1 "register_operand" "f,v"))) (unspec:DI [(match_operand:DI 2 "immediate_operand" "K,K")] UNSPEC_ROUND) (clobber (reg:CC CC_REGNUM))] - "TARGET_Z13 && TARGET_HARD_FLOAT" + "TARGET_VX && TARGET_HARD_FLOAT" "@ clgdbr\t%0,%h2,%1,0 wclgdb\t%v0,%v1,0,%h2" @@ -4718,7 +4718,7 @@ (unspec:GPR [(match_operand:GPR 2 "immediate_operand" "K")] UNSPEC_ROUND) (clobber (reg:CC CC_REGNUM))] "TARGET_Z196 && TARGET_HARD_FLOAT - && (!TARGET_Z13 || <GPR:MODE>mode != DImode || <FP:MODE>mode != DFmode)" + && (!TARGET_VX || <GPR:MODE>mode != DImode || <FP:MODE>mode != DFmode)" "cl<GPR:gf><FP:xde><FP:bt>r\t%0,%h2,%1,0" [(set_attr "op_type" "RRF") (set_attr "type" "ftoi")]) @@ -4738,7 +4738,7 @@ (fix:DI (match_operand:DF 1 "register_operand" "f,v"))) (unspec:DI [(match_operand:DI 2 "immediate_operand" "K,K")] UNSPEC_ROUND) (clobber (reg:CC CC_REGNUM))] - "TARGET_Z13 && TARGET_HARD_FLOAT" + "TARGET_VX && TARGET_HARD_FLOAT" "@ cgdbr\t%0,%h2,%1 wcgdb\t%v0,%v1,0,%h2" @@ -4846,7 +4846,7 @@ (define_insn "*floatunsdidf2_z13" [(set (match_operand:DF 0 "register_operand" "=f,v") (unsigned_float:DF (match_operand:DI 1 "register_operand" "d,v")))] - "TARGET_Z13 && TARGET_HARD_FLOAT" + "TARGET_VX && TARGET_HARD_FLOAT" "@ cdlgbr\t%0,0,%1,0 wcdlgb\t%v0,%v1,0,0" @@ -4950,7 +4950,7 @@ (define_insn "*extendsfdf2_z13" [(set (match_operand:DF 0 "register_operand" "=f,f,v") (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "f,R,v")))] - "TARGET_Z13 && TARGET_HARD_FLOAT" + "TARGET_VX && TARGET_HARD_FLOAT" "@ ldebr\t%0,%1 ldeb\t%0,%1 |