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| author | Vladimir N. Makarov <vmakarov@redhat.com> | 2023-02-13 16:05:04 -0500 |
|---|---|---|
| committer | Vladimir N. Makarov <vmakarov@redhat.com> | 2023-02-13 16:09:12 -0500 |
| commit | a33e3dcbd15e73603796e30b5eeec11a0c8bacec (patch) | |
| tree | 40cb5595c5aa328ac6e3409ab809e247d1413281 | |
| parent | 2ce7e2a83e18a27fe9c659f8667fc24f0df4ea9a (diff) | |
| download | gcc-a33e3dcbd15e73603796e30b5eeec11a0c8bacec.zip gcc-a33e3dcbd15e73603796e30b5eeec11a0c8bacec.tar.gz gcc-a33e3dcbd15e73603796e30b5eeec11a0c8bacec.tar.bz2 | |
RA: Clear reg equiv caller_save_p flag when clearing defined_p flag
IRA can invalidate initially setup equivalence in setup_reg_equiv.
Flag caller_saved was not cleared during invalidation although
init_insns were cleared. It resulted in segmentation fault in
get_equiv. Clearing the flag solves the problem. For more
precaution I added clearing the flag in other places too although it
might be not necessary.
PR rtl-optimization/108774
gcc/ChangeLog:
* ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv
caller_save_p flag when clearing defined_p flag.
(setup_reg_equiv): Ditto.
* lra-constraints.cc (lra_constraints): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr108774.c: New.
| -rw-r--r-- | gcc/ira.cc | 3 | ||||
| -rw-r--r-- | gcc/lra-constraints.cc | 3 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr108774.c | 11 |
3 files changed, 16 insertions, 1 deletions
@@ -2725,6 +2725,7 @@ ira_update_equiv_info_by_shuffle_insn (int to_regno, int from_regno, rtx_insn *i return; } ira_reg_equiv[to_regno].defined_p = false; + ira_reg_equiv[to_regno].caller_save_p = false; ira_reg_equiv[to_regno].memory = ira_reg_equiv[to_regno].constant = ira_reg_equiv[to_regno].invariant @@ -4193,6 +4194,7 @@ setup_reg_equiv (void) if (ira_reg_equiv[i].memory == NULL_RTX) { ira_reg_equiv[i].defined_p = false; + ira_reg_equiv[i].caller_save_p = false; ira_reg_equiv[i].init_insns = NULL; break; } @@ -4203,6 +4205,7 @@ setup_reg_equiv (void) } } ira_reg_equiv[i].defined_p = false; + ira_reg_equiv[i].caller_save_p = false; ira_reg_equiv[i].init_insns = NULL; break; } diff --git a/gcc/lra-constraints.cc b/gcc/lra-constraints.cc index dd4f68b..dbfaf04 100644 --- a/gcc/lra-constraints.cc +++ b/gcc/lra-constraints.cc @@ -5100,7 +5100,8 @@ lra_constraints (bool first_p) && (targetm.preferred_reload_class (x, lra_get_allocno_class (i)) == NO_REGS)) || contains_symbol_ref_p (x)))) - ira_reg_equiv[i].defined_p = false; + ira_reg_equiv[i].defined_p + = ira_reg_equiv[i].caller_save_p = false; if (contains_reg_p (x, false, true)) ira_reg_equiv[i].profitable_p = false; if (get_equiv (reg) != reg) diff --git a/gcc/testsuite/gcc.target/i386/pr108774.c b/gcc/testsuite/gcc.target/i386/pr108774.c new file mode 100644 index 0000000..482bc49 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr108774.c @@ -0,0 +1,11 @@ +/* PR target/108774 */ +/* { dg-do compile { target x86_64-*-* } } */ +/* { dg-options "-Os -ftrapv -mcmodel=large" } */ + +int i, j; + +void +foo (void) +{ + i = ((1 << j) - 1) >> j; +} |