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author | Doug Evans <dje@gnu.org> | 1997-04-13 23:30:18 +0000 |
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committer | Doug Evans <dje@gnu.org> | 1997-04-13 23:30:18 +0000 |
commit | a22ad972279e38bdac5b057846daeb00f1644dce (patch) | |
tree | 83d1aefa63ecf43bc297c36944892759219b5d20 | |
parent | 58a32c5c030a7928ea45640bde5cd3854cc8bce2 (diff) | |
download | gcc-a22ad972279e38bdac5b057846daeb00f1644dce.zip gcc-a22ad972279e38bdac5b057846daeb00f1644dce.tar.gz gcc-a22ad972279e38bdac5b057846daeb00f1644dce.tar.bz2 |
calls.c (expand_call): When copying unaligned values into a register...
* calls.c (expand_call): When copying unaligned values into a register,
zero out the register first rather than emitting a clobber.
From-SVN: r13898
-rw-r--r-- | gcc/calls.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/gcc/calls.c b/gcc/calls.c index d7c4c31..91ebe63 100644 --- a/gcc/calls.c +++ b/gcc/calls.c @@ -1782,9 +1782,15 @@ expand_call (exp, target, ignore) /* Clobber REG and move each partword into it. Ensure we don't go past the end of the structure. Note that the loop below works because we've already verified that padding - and endianness are compatible. */ + and endianness are compatible. - emit_insn (gen_rtx (CLOBBER, VOIDmode, reg)); + We use to emit a clobber here but that doesn't let later + passes optimize the instructions we emit. By storing 0 into + the register later passes know the first AND to zero out the + bitfield being set in the register is unnecessary. The store + of 0 will be deleted as will at least the first AND. */ + + emit_move_insn (reg, const0_rtx); for (bitpos = 0; bitpos < BITS_PER_WORD && bytes > 0; |