amdgcn: simplify secondary reload patterns

Remove some unnecessary complexity; no functional change is intended,
although LRA appears to use the constraints from the reload_in/out
patterns, so it's probably an improvement for it to see the real sgprbase
constraints.

gcc/ChangeLog:

	* config/gcn/gcn-valu.md (mov<mode>_sgprbase): Add @ modifier.
	(reload_in<mode>): Delete.
	(reload_out<mode>): Delete.
	* config/gcn/gcn.cc (CODE_FOR): Delete.
	(get_code_for_##PREFIX##vN##SUFFIX): Delete.
	(CODE_FOR_OP): Delete.
	(get_code_for_##PREFIX): Delete.
	(gcn_secondary_reload): Replace "get_code_for" with "code_for".

2 files changed, 4 insertions, 90 deletions

diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md
index 8c44169..8dc93e8 100644
--- a/gcc/config/gcn/gcn-valu.md
+++ b/gcc/config/gcn/gcn-valu.md
@@ -641,7 +641,7 @@
 ;   vT += Sv
 ;   flat_load v, vT
 
-(define_insn "mov<mode>_sgprbase"
+(define_insn "@mov<mode>_sgprbase"
   [(set (match_operand:V_1REG 0 "nonimmediate_operand")
 	(unspec:V_1REG
 	  [(match_operand:V_1REG 1 "general_operand")]
@@ -655,7 +655,7 @@
   [m,v ,&v;*   ,12] #
   })
 
-(define_insn "mov<mode>_sgprbase"
+(define_insn "@mov<mode>_sgprbase"
   [(set (match_operand:V_2REG 0 "nonimmediate_operand" "= v, v, m")
 	(unspec:V_2REG
 	  [(match_operand:V_2REG 1 "general_operand"   "vDB, m, v")]
@@ -672,7 +672,7 @@
   [(set_attr "type" "vmult,*,*")
    (set_attr "length" "8,12,12")])
 
-(define_insn "mov<mode>_sgprbase"
+(define_insn "@mov<mode>_sgprbase"
   [(set (match_operand:V_4REG 0 "nonimmediate_operand")
 	(unspec:V_4REG
 	  [(match_operand:V_4REG 1 "general_operand")]
@@ -685,31 +685,6 @@
   [m,v  ,&v;*    ,12] #
   })
 
-; reload_in was once a standard name, but here it's only referenced by
-; gcn_secondary_reload.  It allows a reload with a scratch register.
-
-(define_expand "reload_in<mode>"
-  [(set (match_operand:V_MOV 0 "register_operand"     "= v")
-	(match_operand:V_MOV 1 "memory_operand"	      "  m"))
-   (clobber (match_operand:<VnDI> 2 "register_operand" "=&v"))]
-  ""
-  {
-    emit_insn (gen_mov<mode>_sgprbase (operands[0], operands[1], operands[2]));
-    DONE;
-  })
-
-; reload_out is similar to reload_in, above.
-
-(define_expand "reload_out<mode>"
-  [(set (match_operand:V_MOV 0 "memory_operand"	      "= m")
-	(match_operand:V_MOV 1 "register_operand"     "  v"))
-   (clobber (match_operand:<VnDI> 2 "register_operand" "=&v"))]
-  ""
-  {
-    emit_insn (gen_mov<mode>_sgprbase (operands[0], operands[1], operands[2]));
-    DONE;
-  })
-
 ; Expand scalar addresses into gather/scatter patterns
 
 (define_split
diff --git a/gcc/config/gcn/gcn.cc b/gcc/config/gcn/gcn.cc
index ac29925..28065c5 100644
--- a/gcc/config/gcn/gcn.cc
+++ b/gcc/config/gcn/gcn.cc
@@ -1388,64 +1388,6 @@ GEN_VN_NOEXEC (vec_series,si, A(rtx dest, rtx x, rtx c), A(dest, x, c))
 #undef GET_VN_FN
 #undef A
 
-/* Get icode for vector instructions without an optab.  */
-
-#define CODE_FOR(PREFIX, SUFFIX) \
-static int \
-get_code_for_##PREFIX##vN##SUFFIX (int nunits) \
-{ \
-  switch (nunits) \
-    { \
-    case 2: return CODE_FOR_##PREFIX##v2##SUFFIX; \
-    case 4: return CODE_FOR_##PREFIX##v4##SUFFIX; \
-    case 8: return CODE_FOR_##PREFIX##v8##SUFFIX; \
-    case 16: return CODE_FOR_##PREFIX##v16##SUFFIX; \
-    case 32: return CODE_FOR_##PREFIX##v32##SUFFIX; \
-    case 64: return CODE_FOR_##PREFIX##v64##SUFFIX; \
-    } \
-  \
-  gcc_unreachable (); \
-  return CODE_FOR_nothing; \
-}
-
-#define CODE_FOR_OP(PREFIX) \
-	  CODE_FOR (PREFIX, qi) \
-	CODE_FOR (PREFIX, hi) \
-	CODE_FOR (PREFIX, hf) \
-	CODE_FOR (PREFIX, si) \
-	CODE_FOR (PREFIX, sf) \
-	CODE_FOR (PREFIX, di) \
-	CODE_FOR (PREFIX, df) \
-	CODE_FOR (PREFIX, ti) \
-static int \
-get_code_for_##PREFIX (machine_mode mode) \
-{ \
-  int vf = GET_MODE_NUNITS (mode); \
-  machine_mode smode = GET_MODE_INNER (mode); \
-  \
-  switch (smode) \
-    { \
-    case E_QImode: return get_code_for_##PREFIX##vNqi (vf); \
-    case E_HImode: return get_code_for_##PREFIX##vNhi (vf); \
-    case E_HFmode: return get_code_for_##PREFIX##vNhf (vf); \
-    case E_SImode: return get_code_for_##PREFIX##vNsi (vf); \
-    case E_SFmode: return get_code_for_##PREFIX##vNsf (vf); \
-    case E_DImode: return get_code_for_##PREFIX##vNdi (vf); \
-    case E_DFmode: return get_code_for_##PREFIX##vNdf (vf); \
-    case E_TImode: return get_code_for_##PREFIX##vNti (vf); \
-    default: break; \
-    } \
-  \
-  gcc_unreachable (); \
-  return CODE_FOR_nothing; \
-}
-
-CODE_FOR_OP (reload_in)
-CODE_FOR_OP (reload_out)
-
-#undef CODE_FOR_OP
-#undef CODE_FOR
-
 /* Return true if OP is a PARALLEL of CONST_INTs that form a linear
    series with step STEP.  */
 
@@ -2472,10 +2414,7 @@ gcn_secondary_reload (bool in_p, rtx x, reg_class_t rclass,
 	  if (GET_MODE_CLASS (reload_mode) == MODE_VECTOR_INT
 	      || GET_MODE_CLASS (reload_mode) == MODE_VECTOR_FLOAT)
 	    {
-	      if (in_p)
-		sri->icode = get_code_for_reload_in (reload_mode);
-	      else
-		sri->icode = get_code_for_reload_out (reload_mode);
+	      sri->icode = code_for_mov_sgprbase (reload_mode);
 	      break;
 	    }
 	  /* Fallthrough.  */