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| author | Stephane Carrez <Stephane.Carrez@worldnet.fr> | 2001-06-10 12:24:48 +0200 |
|---|---|---|
| committer | Stephane Carrez <ciceron@gcc.gnu.org> | 2001-06-10 12:24:48 +0200 |
| commit | 9eee2c76b87aa978d6ee366d877d6dd32c17fe45 (patch) | |
| tree | afccbd3d054c3b4c065eda31f082e71cab47adfd | |
| parent | 3bcda5fbcedaf4504e05e9173ad81d43e3404524 (diff) | |
| download | gcc-9eee2c76b87aa978d6ee366d877d6dd32c17fe45.zip gcc-9eee2c76b87aa978d6ee366d877d6dd32c17fe45.tar.gz gcc-9eee2c76b87aa978d6ee366d877d6dd32c17fe45.tar.bz2 | |
m68hc11.md ("extendhisi2"): Fix constraints to prefer a memory for operand 1.
* config/m68hc11/m68hc11.md ("extendhisi2"): Fix constraints to
prefer a memory for operand 1.
("*addsi3"): Fix constraints, the '!' was too strong.
("*addsi3_split"): Accept soft register and split accordingly.
From-SVN: r43137
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/m68hc11/m68hc11.md | 30 |
2 files changed, 28 insertions, 9 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 51a44f0..634634a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,12 @@ 2001-06-10 Stephane Carrez <Stephane.Carrez@worldnet.fr> + * config/m68hc11/m68hc11.md ("extendhisi2"): Fix constraints to + prefer a memory for operand 1. + ("*addsi3"): Fix constraints, the '!' was too strong. + ("*addsi3_split"): Accept soft register and split accordingly. + +2001-06-10 Stephane Carrez <Stephane.Carrez@worldnet.fr> + * config/m68hc11/m68hc11-protos.h (m68hc11_initialize_trampoline): Move definition in the RTX_CODE section. diff --git a/gcc/config/m68hc11/m68hc11.md b/gcc/config/m68hc11/m68hc11.md index 38bc6e0..005472d 100644 --- a/gcc/config/m68hc11/m68hc11.md +++ b/gcc/config/m68hc11/m68hc11.md @@ -1444,8 +1444,8 @@ "") (define_insn "extendhisi2" - [(set (match_operand:SI 0 "register_operand" "=D,D") - (sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "dm,!uA")))] + [(set (match_operand:SI 0 "register_operand" "=D,D,D") + (sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "m,!r,0")))] "" "* { @@ -1776,9 +1776,9 @@ }") (define_insn "*addsi3" - [(set (match_operand:SI 0 "non_push_operand" "=m,D,!u,D,!D") + [(set (match_operand:SI 0 "non_push_operand" "=m,D,!u,?D,D") (plus:SI (match_operand:SI 1 "non_push_operand" "%0,0,0,0,0") - (match_operand:SI 2 "general_operand" "ML,i,L,?miu,!D"))) + (match_operand:SI 2 "general_operand" "ML,i,ML,?D,?miu"))) (clobber (match_scratch:HI 3 "=d,X,d,X,X"))] "" "* @@ -1878,14 +1878,26 @@ }") (define_split - [(set (match_operand:SI 0 "register_operand" "=D") - (plus:SI (match_operand:SI 1 "register_operand" "%0") + [(set (match_operand:SI 0 "register_operand" "=D,u") + (plus:SI (match_operand:SI 1 "register_operand" "%0,0") (match_operand:SI 2 "const_int_operand" ""))) - (clobber (match_scratch:HI 3 "=X"))] + (clobber (match_scratch:HI 3 "=X,d"))] "reload_completed && z_replacement_completed == 2 && ((INTVAL (operands[2]) & 0x0FFFF) == 0)" - [(set (reg:HI X_REGNUM) (plus:HI (reg:HI X_REGNUM) (match_dup 3)))] - "operands[3] = m68hc11_gen_highpart (HImode, operands[2]);") + [(set (match_dup 5) (match_dup 6)) + (set (reg:HI 0) (plus:HI (reg:HI 0) (match_dup 4))) + (set (match_dup 6) (match_dup 5))] + "operands[4] = m68hc11_gen_highpart (HImode, operands[2]); + if (X_REG_P (operands[0])) + { + operands[5] = operands[6] = gen_rtx (REG, HImode, HARD_D_REGNUM); + } + else + { + operands[6] = m68hc11_gen_highpart (HImode, operands[1]); + operands[5] = operands[3]; + } + ") (define_split [(set (match_operand:SI 0 "register_operand" "=D") |