RISC-V: Error early with V and no M extension.

For calculating the value of a poly_int at runtime we use a
multiplication instruction that requires the M extension.
Instead of just asserting and ICEing this patch emits an early
error at option-parsing time.

gcc/ChangeLog:

	PR target/116036

	* config/riscv/riscv.cc (riscv_override_options_internal): Error
	with TARGET_VECTOR && !TARGET_MUL.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/arch-31.c: Add m to arch string and expect it.
	* gcc.target/riscv/arch-32.c: Ditto.
	* gcc.target/riscv/arch-37.c: Ditto.
	* gcc.target/riscv/arch-38.c: Ditto.
	* gcc.target/riscv/predef-14.c: Ditto.
	* gcc.target/riscv/predef-15.c: Ditto.
	* gcc.target/riscv/predef-16.c: Ditto.
	* gcc.target/riscv/predef-26.c: Ditto.
	* gcc.target/riscv/predef-27.c: Ditto.
	* gcc.target/riscv/predef-32.c: Ditto.
	* gcc.target/riscv/predef-33.c: Ditto.
	* gcc.target/riscv/predef-36.c: Ditto.
	* gcc.target/riscv/predef-37.c: Ditto.
	* gcc.target/riscv/rvv/autovec/pr111486.c: Add m to arch string.
	* gcc.target/riscv/compare-debug-1.c: Ditto.
	* gcc.target/riscv/compare-debug-2.c: Ditto.
	* gcc.target/riscv/rvv/base/pr116036.c: New test.

18 files changed, 60 insertions, 20 deletions

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 96c4ab6..2bb7f2a 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -9691,6 +9691,11 @@ riscv_override_options_internal (struct gcc_options *opts)
   else if (!TARGET_MUL_OPTS_P (opts) && TARGET_DIV_OPTS_P (opts))
     error ("%<-mdiv%> requires %<-march%> to subsume the %<M%> extension");
 
+  /* We might use a multiplication to calculate the scalable vector length at
+     runtime.  Therefore, require the M extension.  */
+  if (TARGET_VECTOR && !TARGET_MUL)
+    sorry ("GCC's current %<V%> implementation requires the %<M%> extension");
+
   /* Likewise floating-point division and square root.  */
   if ((TARGET_HARD_FLOAT_OPTS_P (opts) || TARGET_ZFINX_OPTS_P (opts))
       && ((target_flags_explicit & MASK_FDIV) == 0))
diff --git a/gcc/testsuite/gcc.target/riscv/arch-31.c b/gcc/testsuite/gcc.target/riscv/arch-31.c
index 5180753..9b867c5 100644
--- a/gcc/testsuite/gcc.target/riscv/arch-31.c
+++ b/gcc/testsuite/gcc.target/riscv/arch-31.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32i_zvfbfmin -mabi=ilp32f" } */
+/* { dg-options "-march=rv32im_zvfbfmin -mabi=ilp32f" } */
 int foo()
 {
 }
diff --git a/gcc/testsuite/gcc.target/riscv/arch-32.c b/gcc/testsuite/gcc.target/riscv/arch-32.c
index 49616832..49a3db7 100644
--- a/gcc/testsuite/gcc.target/riscv/arch-32.c
+++ b/gcc/testsuite/gcc.target/riscv/arch-32.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64iv_zvfbfmin -mabi=lp64d" } */
+/* { dg-options "-march=rv64imv_zvfbfmin -mabi=lp64d" } */
 int foo()
 {
 }
diff --git a/gcc/testsuite/gcc.target/riscv/arch-37.c b/gcc/testsuite/gcc.target/riscv/arch-37.c
index 5b19a73..b56ba77 100644
--- a/gcc/testsuite/gcc.target/riscv/arch-37.c
+++ b/gcc/testsuite/gcc.target/riscv/arch-37.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32i_zvfbfwma -mabi=ilp32f" } */
+/* { dg-options "-march=rv32im_zvfbfwma -mabi=ilp32f" } */
 int
 foo ()
 {}
diff --git a/gcc/testsuite/gcc.target/riscv/arch-38.c b/gcc/testsuite/gcc.target/riscv/arch-38.c
index cee3efe..164a91e 100644
--- a/gcc/testsuite/gcc.target/riscv/arch-38.c
+++ b/gcc/testsuite/gcc.target/riscv/arch-38.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64iv_zvfbfwma -mabi=lp64d" } */
+/* { dg-options "-march=rv64imv_zvfbfwma -mabi=lp64d" } */
 int
 foo ()
 {}
diff --git a/gcc/testsuite/gcc.target/riscv/compare-debug-1.c b/gcc/testsuite/gcc.target/riscv/compare-debug-1.c
index d65bb28..c22e967 100644
--- a/gcc/testsuite/gcc.target/riscv/compare-debug-1.c
+++ b/gcc/testsuite/gcc.target/riscv/compare-debug-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O -fno-tree-ch --param=max-completely-peel-times=0 -march=rv64iv -mabi=lp64d -fcompare-debug" } */
+/* { dg-options "-O -fno-tree-ch --param=max-completely-peel-times=0 -march=rv64imv -mabi=lp64d -fcompare-debug" } */
 
 
 void
diff --git a/gcc/testsuite/gcc.target/riscv/compare-debug-2.c b/gcc/testsuite/gcc.target/riscv/compare-debug-2.c
index d877584..be9bda1 100644
--- a/gcc/testsuite/gcc.target/riscv/compare-debug-2.c
+++ b/gcc/testsuite/gcc.target/riscv/compare-debug-2.c
@@ -1,3 +1,3 @@
 /* { dg-do compile } */
-/* { dg-options "-O -fno-tree-ch --param=max-completely-peel-times=0 -march=rv64iv -mabi=lp64d -fno-dce -fschedule-insns -fcompare-debug" } */
+/* { dg-options "-O -fno-tree-ch --param=max-completely-peel-times=0 -march=rv64imv -mabi=lp64d -fno-dce -fschedule-insns -fcompare-debug" } */
 #include "compare-debug-1.c"
diff --git a/gcc/testsuite/gcc.target/riscv/predef-14.c b/gcc/testsuite/gcc.target/riscv/predef-14.c
index 4815150..138209a 100644
--- a/gcc/testsuite/gcc.target/riscv/predef-14.c
+++ b/gcc/testsuite/gcc.target/riscv/predef-14.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32iv -mabi=ilp32 -mcmodel=medlow -misa-spec=2.2" } */
+/* { dg-options "-march=rv32imv -mabi=ilp32 -mcmodel=medlow -misa-spec=2.2" } */
 
 int main () {
 
@@ -27,8 +27,8 @@ int main () {
 #error "__riscv_a"
 #endif
 
-#if defined(__riscv_m)
-#error "__riscv_m"
+#if !defined(__riscv_mul)
+#error "__riscv_mul"
 #endif
 
 #if !defined(__riscv_f)
diff --git a/gcc/testsuite/gcc.target/riscv/predef-15.c b/gcc/testsuite/gcc.target/riscv/predef-15.c
index dad1495..fd119dc 100644
--- a/gcc/testsuite/gcc.target/riscv/predef-15.c
+++ b/gcc/testsuite/gcc.target/riscv/predef-15.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64iv_zvl512b -mabi=lp64 -mcmodel=medlow -misa-spec=2.2" } */
+/* { dg-options "-march=rv64imv_zvl512b -mabi=lp64 -mcmodel=medlow -misa-spec=2.2" } */
 
 int main () {
 
@@ -27,7 +27,7 @@ int main () {
 #error "__riscv_a"
 #endif
 
-#if defined(__riscv_m)
+#if !defined(__riscv_m)
 #error "__riscv_m"
 #endif
 
diff --git a/gcc/testsuite/gcc.target/riscv/predef-16.c b/gcc/testsuite/gcc.target/riscv/predef-16.c
index faebc1ab4..d64b8dc 100644
--- a/gcc/testsuite/gcc.target/riscv/predef-16.c
+++ b/gcc/testsuite/gcc.target/riscv/predef-16.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64i_zve64f -mabi=lp64 -mcmodel=medlow -misa-spec=2.2" } */
+/* { dg-options "-march=rv64im_zve64f -mabi=lp64 -mcmodel=medlow -misa-spec=2.2" } */
 
 int main () {
 
@@ -27,7 +27,7 @@ int main () {
 #error "__riscv_a"
 #endif
 
-#if defined(__riscv_m)
+#if !defined(__riscv_m)
 #error "__riscv_m"
 #endif
 
diff --git a/gcc/testsuite/gcc.target/riscv/predef-26.c b/gcc/testsuite/gcc.target/riscv/predef-26.c
index 285f64b..df0f05e 100644
--- a/gcc/testsuite/gcc.target/riscv/predef-26.c
+++ b/gcc/testsuite/gcc.target/riscv/predef-26.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O2 -march=rv64i_zvfhmin -mabi=lp64f -mcmodel=medlow -misa-spec=20191213" } */
+/* { dg-options "-O2 -march=rv64im_zvfhmin -mabi=lp64f -mcmodel=medlow -misa-spec=20191213" } */
 
 int main () {
 
@@ -15,6 +15,10 @@ int main () {
 #error "__riscv_i"
 #endif
 
+#if !defined(__riscv_m)
+#error "__riscv_m"
+#endif
+
 #if !defined(__riscv_f)
 #error "__riscv_f"
 #endif
diff --git a/gcc/testsuite/gcc.target/riscv/predef-27.c b/gcc/testsuite/gcc.target/riscv/predef-27.c
index 0f9ab44..554acf3 100644
--- a/gcc/testsuite/gcc.target/riscv/predef-27.c
+++ b/gcc/testsuite/gcc.target/riscv/predef-27.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O2 -march=rv64i_zvfh -mabi=lp64f -mcmodel=medlow -misa-spec=20191213" } */
+/* { dg-options "-O2 -march=rv64im_zvfh -mabi=lp64f -mcmodel=medlow -misa-spec=20191213" } */
 
 int main () {
 
@@ -15,6 +15,10 @@ int main () {
 #error "__riscv_i"
 #endif
 
+#if !defined(__riscv_m)
+#error "__riscv_m"
+#endif
+
 #if !defined(__riscv_f)
 #error "__riscv_f"
 #endif
diff --git a/gcc/testsuite/gcc.target/riscv/predef-32.c b/gcc/testsuite/gcc.target/riscv/predef-32.c
index 7417e0d..6d56f8f 100644
--- a/gcc/testsuite/gcc.target/riscv/predef-32.c
+++ b/gcc/testsuite/gcc.target/riscv/predef-32.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O2 -march=rv32i_zvfbfmin -mabi=ilp32f -mcmodel=medlow -misa-spec=20191213" } */
+/* { dg-options "-O2 -march=rv32im_zvfbfmin -mabi=ilp32f -mcmodel=medlow -misa-spec=20191213" } */
 
 int main () {
 
@@ -15,6 +15,10 @@ int main () {
 #error "__riscv_i"
 #endif
 
+#if !defined(__riscv_m)
+#error "__riscv_m"
+#endif
+
 #if !defined(__riscv_f)
 #error "__riscv_f"
 #endif
diff --git a/gcc/testsuite/gcc.target/riscv/predef-33.c b/gcc/testsuite/gcc.target/riscv/predef-33.c
index 74d05bc..f1da7e5 100644
--- a/gcc/testsuite/gcc.target/riscv/predef-33.c
+++ b/gcc/testsuite/gcc.target/riscv/predef-33.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O2 -march=rv64iv_zvfbfmin -mabi=lp64d -mcmodel=medlow -misa-spec=20191213" } */
+/* { dg-options "-O2 -march=rv64imv_zvfbfmin -mabi=lp64d -mcmodel=medlow -misa-spec=20191213" } */
 
 int main () {
 
@@ -15,6 +15,10 @@ int main () {
 #error "__riscv_i"
 #endif
 
+#if !defined(__riscv_m)
+#error "__riscv_m"
+#endif
+
 #if !defined(__riscv_f)
 #error "__riscv_f"
 #endif
diff --git a/gcc/testsuite/gcc.target/riscv/predef-36.c b/gcc/testsuite/gcc.target/riscv/predef-36.c
index b0205b0..7c87a42 100644
--- a/gcc/testsuite/gcc.target/riscv/predef-36.c
+++ b/gcc/testsuite/gcc.target/riscv/predef-36.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O2 -march=rv32i_zvfbfwma -mabi=ilp32f -mcmodel=medlow -misa-spec=20191213" } */
+/* { dg-options "-O2 -march=rv32im_zvfbfwma -mabi=ilp32f -mcmodel=medlow -misa-spec=20191213" } */
 
 int
 main ()
@@ -16,6 +16,10 @@ main ()
 #error "__riscv_i"
 #endif
 
+#if !defined(__riscv_m)
+#error "__riscv_m"
+#endif
+
 #if !defined(__riscv_f)
 #error "__riscv_f"
 #endif
diff --git a/gcc/testsuite/gcc.target/riscv/predef-37.c b/gcc/testsuite/gcc.target/riscv/predef-37.c
index b5aa411..150150e 100644
--- a/gcc/testsuite/gcc.target/riscv/predef-37.c
+++ b/gcc/testsuite/gcc.target/riscv/predef-37.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O2 -march=rv64iv_zvfbfwma -mabi=lp64d -mcmodel=medlow -misa-spec=20191213" } */
+/* { dg-options "-O2 -march=rv64imv_zvfbfwma -mabi=lp64d -mcmodel=medlow -misa-spec=20191213" } */
 
 int
 main ()
@@ -16,6 +16,10 @@ main ()
 #error "__riscv_i"
 #endif
 
+#if !defined(__riscv_m)
+#error "__riscv_m"
+#endif
+
 #if !defined(__riscv_f)
 #error "__riscv_f"
 #endif
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111486.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111486.c
index 2ba2a36..483e9b9 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111486.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111486.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64iv -mabi=lp64d -O2" } */
+/* { dg-options "-march=rv64imv -mabi=lp64d -O2" } */
 
 typedef char __attribute__((__vector_size__ (1))) V;
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr116036.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr116036.c
new file mode 100644
index 0000000..a722095
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr116036.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64idv -mabi=lp64d -O3" } */
+
+int a[15][15];
+void init() {
+  for (int i_0 ; i_0 < 15 ; ++i_0)
+    for (int i_1 = 0; i_1 < 15; ++i_1)
+      a[i_0][i_1] = 1;
+}
+
+/* { dg-excess-errors "sorry, unimplemented: GCC's current 'V' implementation requires the 'M' extension" } */