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author | Jeff Law <jlaw@ventanamicro.com> | 2024-06-09 09:17:55 -0600 |
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committer | Jeff Law <jlaw@ventanamicro.com> | 2024-06-09 09:17:55 -0600 |
commit | 932c6f8dd8859afb13475c2de466bd1a159530da (patch) | |
tree | 55c748baa1e3df829344b17cc3fd39a76a051c24 | |
parent | 8bb6b2f4ae19c3aab7d7a5e5c8f5965f89d90e01 (diff) | |
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[committed] [RISC-V] Fix false-positive uninitialized variable
Andreas noted we were getting an uninit warning after the recent constant
synthesis changes. Essentially there's no way for the uninit analysis code to
know the first entry in the CODES array is a UNKNOWN which will set X before
its first use.
So trivial initialization with NULL_RTX is the obvious fix.
Pushed to the trunk.
gcc/
* config/riscv/riscv.cc (riscv_move_integer): Initialize "x".
-rw-r--r-- | gcc/config/riscv/riscv.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 95f3636..c17141d 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -2720,7 +2720,7 @@ riscv_move_integer (rtx temp, rtx dest, HOST_WIDE_INT value, struct riscv_integer_op codes[RISCV_MAX_INTEGER_OPS]; machine_mode mode; int i, num_ops; - rtx x; + rtx x = NULL_RTX; mode = GET_MODE (dest); /* We use the original mode for the riscv_build_integer call, because HImode |