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| author | Roger Sayle <roger@eyesopen.com> | 2004-09-10 02:29:57 +0000 |
|---|---|---|
| committer | Roger Sayle <sayle@gcc.gnu.org> | 2004-09-10 02:29:57 +0000 |
| commit | 903a5059b66d154ec6d064b832d896daf11aacff (patch) | |
| tree | e955b1415e114dc923cb924605365b236096a762 | |
| parent | 469c26f1672c58c8e6e540d2066134cc67046b4e (diff) | |
| download | gcc-903a5059b66d154ec6d064b832d896daf11aacff.zip gcc-903a5059b66d154ec6d064b832d896daf11aacff.tar.gz gcc-903a5059b66d154ec6d064b832d896daf11aacff.tar.bz2 | |
i386.c (ix86_split_long_move): When optimizing for size...
* config/i386/i386.c (ix86_split_long_move): When optimizing for
size, and the low and high parts of a DImode constant are equal,
copy one register to another instead of loading the same immediate
value twice.
From-SVN: r87270
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/i386/i386.c | 27 |
2 files changed, 34 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0d8f266..06bef51 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2004-09-09 Roger Sayle <roger@eyesopen.com> + + * config/i386/i386.c (ix86_split_long_move): When optimizing for + size, and the low and high parts of a DImode constant are equal, + copy one register to another instead of loading the same immediate + value twice. + 2004-09-09 Richard Henderson <rth@redhat.com> PR middle-end/17367 diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 25fa8d8..2a175452 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -9938,6 +9938,33 @@ ix86_split_long_move (rtx operands[]) operands[6] = part[1][1]; } } + + /* If optimizing for size, attempt to locally unCSE non-zero constants. */ + if (optimize_size) + { + if (GET_CODE (operands[5]) == CONST_INT + && operands[5] != const0_rtx + && REG_P (operands[2])) + { + if (GET_CODE (operands[6]) == CONST_INT + && INTVAL (operands[6]) == INTVAL (operands[5])) + operands[6] = operands[2]; + + if (nparts == 3 + && GET_CODE (operands[7]) == CONST_INT + && INTVAL (operands[7]) == INTVAL (operands[5])) + operands[7] = operands[2]; + } + + if (nparts == 3 + && GET_CODE (operands[6]) == CONST_INT + && operands[6] != const0_rtx + && REG_P (operands[3]) + && GET_CODE (operands[7]) == CONST_INT + && INTVAL (operands[7]) == INTVAL (operands[6])) + operands[7] = operands[3]; + } + emit_move_insn (operands[2], operands[5]); emit_move_insn (operands[3], operands[6]); if (nparts == 3) |