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| author | Richard Sandiford <richard.sandiford@arm.com> | 2020-11-17 11:12:52 +0000 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2020-11-17 11:12:52 +0000 |
| commit | 8a1f6529062857523988202bad813304f003e8e1 (patch) | |
| tree | b17c63f94ee8fca30e12c957501da55ef7dd5fa6 | |
| parent | f5647cf49f0ee861eca9d9b5c4b0333ee11e6017 (diff) | |
| download | gcc-8a1f6529062857523988202bad813304f003e8e1.zip gcc-8a1f6529062857523988202bad813304f003e8e1.tar.gz gcc-8a1f6529062857523988202bad813304f003e8e1.tar.bz2 | |
testsuite: Adjust vect/pr65947-8.c for SVE
We can vectorise vect/pr65947-8.c for SVE, as we can for GCN.
gcc/testsuite/
* gcc.dg/vect/pr65947-8.c: Expect the loop to be vectorized for SVE.
| -rw-r--r-- | gcc/testsuite/gcc.dg/vect/pr65947-8.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/gcc/testsuite/gcc.dg/vect/pr65947-8.c b/gcc/testsuite/gcc.dg/vect/pr65947-8.c index a2a940d..d042679 100644 --- a/gcc/testsuite/gcc.dg/vect/pr65947-8.c +++ b/gcc/testsuite/gcc.dg/vect/pr65947-8.c @@ -41,6 +41,6 @@ main (void) return 0; } -/* { dg-final { scan-tree-dump-not "LOOP VECTORIZED" "vect" { target { ! amdgcn*-*-* } } } } */ -/* { dg-final { scan-tree-dump "LOOP VECTORIZED" "vect" { target amdgcn*-*-* } } } */ -/* { dg-final { scan-tree-dump "multiple types in double reduction or condition reduction" "vect" { target { ! amdgcn*-*-* } } } } */ +/* { dg-final { scan-tree-dump-not "LOOP VECTORIZED" "vect" { target { ! { amdgcn*-*-* || aarch64_sve } } } } } */ +/* { dg-final { scan-tree-dump "LOOP VECTORIZED" "vect" { target { amdgcn*-*-* || aarch64_sve } } } } */ +/* { dg-final { scan-tree-dump "multiple types in double reduction or condition reduction" "vect" { target { ! { amdgcn*-*-* || aarch64_sve } } } } } */ |