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| author | Richard Kenner <kenner@gcc.gnu.org> | 1994-06-23 18:59:43 -0400 |
|---|---|---|
| committer | Richard Kenner <kenner@gcc.gnu.org> | 1994-06-23 18:59:43 -0400 |
| commit | 84b49fa7d71e3cd4c048f9705dd37f2c7ddb655f (patch) | |
| tree | 85b08c1f2999a882e7b60d6f4faa786453b65186 | |
| parent | 8838265b317b7afd3c3ad2ad713e9637b3b9b127 (diff) | |
| download | gcc-84b49fa7d71e3cd4c048f9705dd37f2c7ddb655f.zip gcc-84b49fa7d71e3cd4c048f9705dd37f2c7ddb655f.tar.gz gcc-84b49fa7d71e3cd4c048f9705dd37f2c7ddb655f.tar.bz2 | |
(CPP_PREDEFINES): Define _POWER (alias for _IBMR2).
(CPP_SPEC): New macro.
From-SVN: r7545
| -rw-r--r-- | gcc/config/rs6000/rs6000.h | 31 |
1 files changed, 30 insertions, 1 deletions
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index f3e9383..947bc19 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -25,7 +25,8 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ /* Names to predefine in the preprocessor for this target machine. */ -#define CPP_PREDEFINES "-D_IBMR2 -D_AIX -D_AIX32 -Asystem(unix) -Asystem(aix) -Acpu(rs6000) -Amachine(rs6000)" +#define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 \ +-Asystem(unix) -Asystem(aix) -Acpu(rs6000) -Amachine(rs6000)" /* Print subsidiary information on the compiler version in use. */ #define TARGET_VERSION ; @@ -40,6 +41,34 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ /* #define ASM_SPEC "-u" */ +/* Define appropriate architecture macros for preprocessor depending on + target switches. */ + +#define CPP_SPEC "\ +%{!mcpu*: \ + %{mpower: %{!mpower2: -D_ARCH_PWR}} \ + %{mpower2: -D_ARCH_PWR2} \ + %{mpowerpc*: -D_ARCH_PPC} \ + %{mno-power: %{!mpowerpc*: -D_ARCH_COM}} \ + %{!mno-power: %{!mpower2: -D_ARCH_PWR}}} \ +%{mcpu=common: -D_ARCH_COM} \ +%{mcpu=power: -D_ARCH_PWR} \ +%{mcpu=powerpc: -D_ARCH_PPC} \ +%{mcpu=rios: -D_ARCH_PWR} \ +%{mcpu=rios1: -D_ARCH_PWR} \ +%{mcpu=rios2: -D_ARCH_PWR2} \ +%{mcpu=rsc: -D_ARCH_PWR} \ +%{mcpu=rsc1: -D_ARCH_PWR} \ +%{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \ +%{mcpu=mpc601: -D_ARCH_PPC -D_ARCH_PWR} \ +%{mcpu=ppc601: -D_ARCH_PPC -D_ARCH_PWR} \ +%{mcpu=603: -D_ARCH_PPC} \ +%{mcpu=mpc603: -D_ARCH_PPC} \ +%{mcpu=ppc603: -D_ARCH_PPC} \ +%{mcpu=604: -D_ARCH_PPC} \ +%{mcpu=mpc604: -D_ARCH_PPC} \ +%{mcpu=ppc604: -D_ARCH_PPC}" + /* Define the options for the binder: Start text at 512, align all segments to 512 bytes, and warn if there is text relocation. |