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authorAndrea Corallo <andrea.corallo@arm.com>2022-11-15 10:29:31 +0100
committerAndrea Corallo <andrea.corallo@arm.com>2022-11-28 10:09:20 +0100
commit78b5b76f935f5ba3a5d4b58ccd0ab21b7bfe6f39 (patch)
tree51d978474dfd7f2bb228d63a96df6afb597f49cd
parentbf6b04c6baa12fccc0dad53d45ae808def34fb6c (diff)
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arm: improve tests and fix vadd*
gcc/ChangeLog: * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si) (mve_vaddq_n_<supf><mode>, mve_vaddvaq_<supf><mode>) (mve_vaddlvaq_<supf>v4si, mve_vaddq_n_f<mode>) (mve_vaddlvaq_p_<supf>v4si, mve_vaddq<mode>, mve_vaddq_f<mode>): Fix spacing. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c: Improve test. * gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddlvq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddlvq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_u8.c: Likewise.
-rw-r--r--gcc/config/arm/mve.md18
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c24
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c40
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c16
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c28
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c24
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c24
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c22
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c20
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c16
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c16
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c26
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c26
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c42
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c42
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c26
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c26
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c26
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c42
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c42
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c42
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c26
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c26
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c26
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c26
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c26
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c26
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c28
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c28
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c16
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c16
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c16
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c28
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c28
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c28
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c16
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c16
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c16
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c16
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c16
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c16
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c26
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c26
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c42
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c42
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c26
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c26
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c26
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c42
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c42
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c42
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c26
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c26
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c26
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c26
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c26
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c26
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c24
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c24
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c24
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c40
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c40
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c40
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c16
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c16
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c16
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c28
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c28
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c28
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c24
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c24
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c24
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c24
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c24
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c24
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c22
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c22
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c20
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c20
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c20
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c20
81 files changed, 1864 insertions, 252 deletions
diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index bc4e2f2..5ce2a28 100644
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -636,7 +636,7 @@
VADDLVQ))
]
"TARGET_HAVE_MVE"
- "vaddlv.<supf>32 %Q0, %R0, %q1"
+ "vaddlv.<supf>32\t%Q0, %R0, %q1"
[(set_attr "type" "mve_move")
])
@@ -817,7 +817,7 @@
VADDLVQ_P))
]
"TARGET_HAVE_MVE"
- "vpst\;vaddlvt.<supf>32 %Q0, %R0, %q1"
+ "vpst\;vaddlvt.<supf>32\t%Q0, %R0, %q1"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@@ -879,7 +879,7 @@
VADDQ_N))
]
"TARGET_HAVE_MVE"
- "vadd.i%#<V_sz_elem> %q0, %q1, %2"
+ "vadd.i%#<V_sz_elem>\t%q0, %q1, %2"
[(set_attr "type" "mve_move")
])
@@ -894,7 +894,7 @@
VADDVAQ))
]
"TARGET_HAVE_MVE"
- "vaddva.<supf>%#<V_sz_elem> %0, %q2"
+ "vaddva.<supf>%#<V_sz_elem>\t%0, %q2"
[(set_attr "type" "mve_move")
])
@@ -1834,7 +1834,7 @@
VADDLVAQ))
]
"TARGET_HAVE_MVE"
- "vaddlva.<supf>32 %Q0, %R0, %q2"
+ "vaddlva.<supf>32\t%Q0, %R0, %q2"
[(set_attr "type" "mve_move")
])
@@ -1849,7 +1849,7 @@
VADDQ_N_F))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
- "vadd.f%#<V_sz_elem> %q0, %q1, %2"
+ "vadd.f%#<V_sz_elem>\t%q0, %q1, %2"
[(set_attr "type" "mve_move")
])
@@ -3717,7 +3717,7 @@
VADDLVAQ_P))
]
"TARGET_HAVE_MVE"
- "vpst\;vaddlvat.<supf>32 %Q0, %R0, %q2"
+ "vpst\;vaddlvat.<supf>32\t%Q0, %R0, %q2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
;;
@@ -8928,7 +8928,7 @@
(match_operand:MVE_2 2 "s_register_operand" "w")))
]
"TARGET_HAVE_MVE"
- "vadd.i%#<V_sz_elem> %q0, %q1, %q2"
+ "vadd.i%#<V_sz_elem>\t%q0, %q1, %q2"
[(set_attr "type" "mve_move")
])
@@ -8942,7 +8942,7 @@
(match_operand:MVE_0 2 "s_register_operand" "w")))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
- "vadd.f%#<V_sz_elem> %q0, %q1, %q2"
+ "vadd.f%#<V_sz_elem>\t%q0, %q1, %q2"
[(set_attr "type" "mve_move")
])
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c
index 0991ac1..3a9504d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddlvat.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int64_t
foo (int64_t a, int32x4_t b, mve_pred16_t p)
{
return vaddlvaq_p_s32 (a, b, p);
}
-/* { dg-final { scan-assembler "vaddlvat.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddlvat.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int64_t
foo1 (int64_t a, int32x4_t b, mve_pred16_t p)
{
return vaddlvaq_p (a, b, p);
}
-/* { dg-final { scan-assembler "vaddlvat.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c
index 5af786e..6e2613e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c
@@ -1,21 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddlvat.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint64_t
foo (uint64_t a, uint32x4_t b, mve_pred16_t p)
{
return vaddlvaq_p_u32 (a, b, p);
}
-/* { dg-final { scan-assembler "vaddlvat.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddlvat.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint64_t
foo1 (uint64_t a, uint32x4_t b, mve_pred16_t p)
{
return vaddlvaq_p (a, b, p);
}
-/* { dg-final { scan-assembler "vaddlvat.u32" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddlvat.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
+uint64_t
+foo2 (uint32x4_t b, mve_pred16_t p)
+{
+ return vaddlvaq_p (1, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c
index 78f155f..180dc9b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vaddlva.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int64_t
foo (int64_t a, int32x4_t b)
{
return vaddlvaq_s32 (a, b);
}
-/* { dg-final { scan-assembler "vaddlva.s32" } } */
+/*
+**foo1:
+** ...
+** vaddlva.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int64_t
foo1 (int64_t a, int32x4_t b)
{
return vaddlvaq (a, b);
}
-/* { dg-final { scan-assembler "vaddlva.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c
index a7dfa25..1f899e9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c
@@ -1,21 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vaddlva.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint64_t
foo (uint64_t a, uint32x4_t b)
{
return vaddlvaq_u32 (a, b);
}
-/* { dg-final { scan-assembler "vaddlva.u32" } } */
+/*
+**foo1:
+** ...
+** vaddlva.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint64_t
foo1 (uint64_t a, uint32x4_t b)
{
return vaddlvaq (a, b);
}
-/* { dg-final { scan-assembler "vaddlva.u32" } } */
+/*
+**foo2:
+** ...
+** vaddlva.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
+uint64_t
+foo2 (uint32x4_t b)
+{
+ return vaddlvaq (1, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c
index 8aa1832..5b22da4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddlvt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int64_t
foo (int32x4_t a, mve_pred16_t p)
{
return vaddlvq_p_s32 (a, p);
}
-/* { dg-final { scan-assembler "vaddlvt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddlvt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int64_t
foo1 (int32x4_t a, mve_pred16_t p)
{
return vaddlvq_p (a, p);
}
-/* { dg-final { scan-assembler "vaddlvt.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c
index a9cee74..2c85139 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddlvt.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint64_t
foo (uint32x4_t a, mve_pred16_t p)
{
return vaddlvq_p_u32 (a, p);
}
-/* { dg-final { scan-assembler "vaddlvt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddlvt.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint64_t
foo1 (uint32x4_t a, mve_pred16_t p)
{
return vaddlvq_p (a, p);
}
-/* { dg-final { scan-assembler "vaddlvt.u32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c
index 4bd70aa..bdb04b5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c
@@ -1,21 +1,33 @@
-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vaddlv.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int64_t
foo (int32x4_t a)
{
return vaddlvq_s32 (a);
}
-/* { dg-final { scan-assembler "vaddlv.s32" } } */
+/*
+**foo1:
+** ...
+** vaddlv.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int64_t
foo1 (int32x4_t a)
{
- return vaddlvq_s32 (a);
+ return vaddlvq (a);
}
-/* { dg-final { scan-assembler "vaddlv.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c
index 2148bd9..bcd9d21 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vaddlv.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint64_t
foo (uint32x4_t a)
{
- return vaddlvq_u32 (a);
+ return vaddlvq_u32 (a);
}
-/* { dg-final { scan-assembler "vaddlv.u32" } } */
+/*
+**foo1:
+** ...
+** vaddlv.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint64_t
foo1 (uint32x4_t a)
{
- return vaddlvq (a);
+ return vaddlvq (a);
}
-/* { dg-final { scan-assembler "vaddlv.u32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c
index 3d1100a..5846217 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vadd.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, float16x8_t b)
{
return vaddq_f16 (a, b);
}
-/* { dg-final { scan-assembler "vadd.f16" } } */
+/*
+**foo1:
+** ...
+** vadd.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b)
{
return vaddq (a, b);
}
-/* { dg-final { scan-assembler "vadd.f16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c
index e15e0d1..f3fcd28 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vadd.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, float32x4_t b)
{
return vaddq_f32 (a, b);
}
-/* { dg-final { scan-assembler "vadd.f32" } } */
+/*
+**foo1:
+** ...
+** vadd.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b)
{
return vaddq (a, b);
}
-/* { dg-final { scan-assembler "vadd.f32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c
index 51d7020..291e65f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vaddq_m_f16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vaddq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.f16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c
index 7821bc2..0346f65 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vaddq_m_f32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vaddq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.f32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c
index 796bed4..9d57bbd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
{
return vaddq_m_n_f16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
{
return vaddq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.f16" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+float16x8_t
+foo2 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
+{
+ return vaddq_m (inactive, a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c
index afa3c4c..9939aa0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
{
return vaddq_m_n_f32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
{
return vaddq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.f32" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+float32x4_t
+foo2 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
+{
+ return vaddq_m (inactive, a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c
index 0ef4337..50b138f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
{
return vaddq_m_n_s16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
{
return vaddq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c
index 46ac88e..66c2be7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
{
return vaddq_m_n_s32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
{
return vaddq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c
index 1867d56..87dba75 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
{
return vaddq_m_n_s8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
{
return vaddq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c
index 1da993b..a8e9ea5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
{
return vaddq_m_n_u16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
{
return vaddq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i16" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+uint16x8_t
+foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
+{
+ return vaddq_m (inactive, a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c
index d7404c9..045e502 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
{
return vaddq_m_n_u32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
{
return vaddq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i32" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+uint32x4_t
+foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
+{
+ return vaddq_m (inactive, a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c
index 013e839..3d17afc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
{
return vaddq_m_n_u8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
{
return vaddq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i8" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+uint8x16_t
+foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
+{
+ return vaddq_m (inactive, a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c
index 244c88f..87210a4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vaddq_m_s16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vaddq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c
index 7a59d75..1acb0b6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vaddq_m_s32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vaddq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c
index 5b8c74a..6136c54 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vaddq_m_s8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vaddq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c
index f28e3d7..b60d98e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vaddq_m_u16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vaddq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c
index aeb836c..d56bbae 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vaddq_m_u32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vaddq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c
index c698df3..9f0b623 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vaddq_m_u8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vaddq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c
index 024fab5..5df23a6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c
@@ -1,21 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vadd.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, float16_t b)
{
return vaddq_n_f16 (a, b);
}
-/* { dg-final { scan-assembler "vadd.f16" } } */
+/*
+**foo1:
+** ...
+** vadd.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, float16_t b)
{
return vaddq (a, b);
}
-/* { dg-final { scan-assembler "vadd.f16" } } */
+/*
+**foo2:
+** ...
+** vadd.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+float16x8_t
+foo2 (float16x8_t a)
+{
+ return vaddq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c
index 06b1528..d07927c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c
@@ -1,21 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vadd.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, float32_t b)
{
return vaddq_n_f32 (a, b);
}
-/* { dg-final { scan-assembler "vadd.f32" } } */
+/*
+**foo1:
+** ...
+** vadd.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, float32_t b)
{
return vaddq (a, b);
}
-/* { dg-final { scan-assembler "vadd.f32" } } */
+/*
+**foo2:
+** ...
+** vadd.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+float32x4_t
+foo2 (float32x4_t a)
+{
+ return vaddq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c
index 63765f4..9ae3040 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vadd.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t a, int16_t b)
{
return vaddq_n_s16 (a, b);
}
-/* { dg-final { scan-assembler "vadd.i16" } } */
+/*
+**foo1:
+** ...
+** vadd.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t a, int16_t b)
{
return vaddq (a, b);
}
-/* { dg-final { scan-assembler "vadd.i16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c
index e462fbf..3271d4d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vadd.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t a, int32_t b)
{
return vaddq_n_s32 (a, b);
}
-/* { dg-final { scan-assembler "vadd.i32" } } */
+/*
+**foo1:
+** ...
+** vadd.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t a, int32_t b)
{
return vaddq (a, b);
}
-/* { dg-final { scan-assembler "vadd.i32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c
index ad7181f..119fd5d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vadd.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t a, int8_t b)
{
return vaddq_n_s8 (a, b);
}
-/* { dg-final { scan-assembler "vadd.i8" } } */
+/*
+**foo1:
+** ...
+** vadd.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t a, int8_t b)
{
return vaddq (a, b);
}
-/* { dg-final { scan-assembler "vadd.i8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c
index dac7a9f..ef0722e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c
@@ -1,21 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vadd.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t a, uint16_t b)
{
return vaddq_n_u16 (a, b);
}
-/* { dg-final { scan-assembler "vadd.i16" } } */
+/*
+**foo1:
+** ...
+** vadd.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t a, uint16_t b)
{
return vaddq (a, b);
}
-/* { dg-final { scan-assembler "vadd.i16" } } */
+/*
+**foo2:
+** ...
+** vadd.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+uint16x8_t
+foo2 (uint16x8_t a)
+{
+ return vaddq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c
index 2f1feb8..6751381 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c
@@ -1,21 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vadd.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t a, uint32_t b)
{
return vaddq_n_u32 (a, b);
}
-/* { dg-final { scan-assembler "vadd.i32" } } */
+/*
+**foo1:
+** ...
+** vadd.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t a, uint32_t b)
{
return vaddq (a, b);
}
-/* { dg-final { scan-assembler "vadd.i32" } } */
+/*
+**foo2:
+** ...
+** vadd.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+uint32x4_t
+foo2 (uint32x4_t a)
+{
+ return vaddq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c
index 325bdad..2aa79e5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c
@@ -1,21 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vadd.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t a, uint8_t b)
{
return vaddq_n_u8 (a, b);
}
-/* { dg-final { scan-assembler "vadd.i8" } } */
+/*
+**foo1:
+** ...
+** vadd.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t a, uint8_t b)
{
return vaddq (a, b);
}
-/* { dg-final { scan-assembler "vadd.i8" } } */
+/*
+**foo2:
+** ...
+** vadd.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+uint8x16_t
+foo2 (uint8x16_t a)
+{
+ return vaddq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c
index 31f6cb4..24b12a6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vadd.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t a, int16x8_t b)
{
return vaddq_s16 (a, b);
}
-/* { dg-final { scan-assembler "vadd.i16" } } */
+/*
+**foo1:
+** ...
+** vadd.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t a, int16x8_t b)
{
return vaddq (a, b);
}
-/* { dg-final { scan-assembler "vadd.i16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c
index 96aead1..3fdfa3d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vadd.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t a, int32x4_t b)
{
return vaddq_s32 (a, b);
}
-/* { dg-final { scan-assembler "vadd.i32" } } */
+/*
+**foo1:
+** ...
+** vadd.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t a, int32x4_t b)
{
return vaddq (a, b);
}
-/* { dg-final { scan-assembler "vadd.i32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c
index 6676a2e..6b32b8c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vadd.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t a, int8x16_t b)
{
return vaddq_s8 (a, b);
}
-/* { dg-final { scan-assembler "vadd.i8" } } */
+/*
+**foo1:
+** ...
+** vadd.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t a, int8x16_t b)
{
return vaddq (a, b);
}
-/* { dg-final { scan-assembler "vadd.i8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c
index 1b19876..0deefa1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vadd.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t a, uint16x8_t b)
{
return vaddq_u16 (a, b);
}
-/* { dg-final { scan-assembler "vadd.i16" } } */
+/*
+**foo1:
+** ...
+** vadd.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t a, uint16x8_t b)
{
return vaddq (a, b);
}
-/* { dg-final { scan-assembler "vadd.i16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c
index 8f5acc6..44df963 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vadd.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t a, uint32x4_t b)
{
return vaddq_u32 (a, b);
}
-/* { dg-final { scan-assembler "vadd.i32" } } */
+/*
+**foo1:
+** ...
+** vadd.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t a, uint32x4_t b)
{
return vaddq (a, b);
}
-/* { dg-final { scan-assembler "vadd.i32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c
index e5be2fa..7349fa1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vadd.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t a, uint8x16_t b)
{
return vaddq_u8 (a, b);
}
-/* { dg-final { scan-assembler "vadd.i8" } } */
+/*
+**foo1:
+** ...
+** vadd.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t a, uint8x16_t b)
{
return vaddq (a, b);
}
-/* { dg-final { scan-assembler "vadd.i8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c
index bd2a198..b1d48a1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vaddq_x_f16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vaddq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.f16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c
index 5369f4d..047043d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vaddq_x_f32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vaddq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.f32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c
index d2eed8c..ed67007 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, float16_t b, mve_pred16_t p)
{
return vaddq_x_n_f16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
{
return vaddq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.f16" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+float16x8_t
+foo2 (float16x8_t a, mve_pred16_t p)
+{
+ return vaddq_x (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c
index 40d56da..fa17d6b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, float32_t b, mve_pred16_t p)
{
return vaddq_x_n_f32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
{
return vaddq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.f32" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+float32x4_t
+foo2 (float32x4_t a, mve_pred16_t p)
+{
+ return vaddq_x (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c
index e974cdf..d6c3252 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t a, int16_t b, mve_pred16_t p)
{
return vaddq_x_n_s16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
{
return vaddq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c
index a6ac9cc..c2a8617 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t a, int32_t b, mve_pred16_t p)
{
return vaddq_x_n_s32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
{
return vaddq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c
index f5539ef..abc90a4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t a, int8_t b, mve_pred16_t p)
{
return vaddq_x_n_s8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
{
return vaddq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c
index f167df1..8866a07 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
{
return vaddq_x_n_u16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
{
return vaddq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i16" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+uint16x8_t
+foo2 (uint16x8_t a, mve_pred16_t p)
+{
+ return vaddq_x (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c
index 653c3ee..4123ad5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
{
return vaddq_x_n_u32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
{
return vaddq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i32" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+uint32x4_t
+foo2 (uint32x4_t a, mve_pred16_t p)
+{
+ return vaddq_x (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c
index 0ad65c8..d610930 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
{
return vaddq_x_n_u8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
{
return vaddq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i8" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+uint8x16_t
+foo2 (uint8x16_t a, mve_pred16_t p)
+{
+ return vaddq_x (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c
index 75b1491..323010a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vaddq_x_s16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vaddq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c
index 1aadebd..98773e7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vaddq_x_s32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vaddq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c
index d6b07ce..bff0bda 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vaddq_x_s8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vaddq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c
index 5c9abc2..85f5cd4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vaddq_x_u16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vaddq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c
index d55ec73..ad0e7af 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vaddq_x_u32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vaddq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c
index bcc058b..a3cfc56 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vaddq_x_u8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vaddq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vaddt.i8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c
index c4bfe34..16b5151 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvat.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
foo (int32_t a, int16x8_t b, mve_pred16_t p)
{
return vaddvaq_p_s16 (a, b, p);
}
-/* { dg-final { scan-assembler "vaddvat.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvat.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
foo1 (int32_t a, int16x8_t b, mve_pred16_t p)
{
return vaddvaq_p (a, b, p);
}
-/* { dg-final { scan-assembler "vaddvat.s16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c
index cdc3280..bbf04aa 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvat.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
foo (int32_t a, int32x4_t b, mve_pred16_t p)
{
return vaddvaq_p_s32 (a, b, p);
}
-/* { dg-final { scan-assembler "vaddvat.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvat.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
{
return vaddvaq_p (a, b, p);
}
-/* { dg-final { scan-assembler "vaddvat.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c
index d330411..f06623b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvat.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
foo (int32_t a, int8x16_t b, mve_pred16_t p)
{
return vaddvaq_p_s8 (a, b, p);
}
-/* { dg-final { scan-assembler "vaddvat.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvat.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
foo1 (int32_t a, int8x16_t b, mve_pred16_t p)
{
return vaddvaq_p (a, b, p);
}
-/* { dg-final { scan-assembler "vaddvat.s8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c
index 74d9246..7bfb4bb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c
@@ -1,21 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvat.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
foo (uint32_t a, uint16x8_t b, mve_pred16_t p)
{
return vaddvaq_p_u16 (a, b, p);
}
-/* { dg-final { scan-assembler "vaddvat.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvat.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
foo1 (uint32_t a, uint16x8_t b, mve_pred16_t p)
{
return vaddvaq_p (a, b, p);
}
-/* { dg-final { scan-assembler "vaddvat.u16" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvat.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
+uint32_t
+foo2 (uint16x8_t b, mve_pred16_t p)
+{
+ return vaddvaq_p (1, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c
index e4ec42b..9aea5ca 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c
@@ -1,21 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvat.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
foo (uint32_t a, uint32x4_t b, mve_pred16_t p)
{
return vaddvaq_p_u32 (a, b, p);
}
-/* { dg-final { scan-assembler "vaddvat.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvat.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
{
return vaddvaq_p (a, b, p);
}
-/* { dg-final { scan-assembler "vaddvat.u32" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvat.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
+uint32_t
+foo2 (uint32x4_t b, mve_pred16_t p)
+{
+ return vaddvaq_p (1, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c
index f9bed83..b5113b2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c
@@ -1,21 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvat.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
foo (uint32_t a, uint8x16_t b, mve_pred16_t p)
{
return vaddvaq_p_u8 (a, b, p);
}
-/* { dg-final { scan-assembler "vaddvat.u8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvat.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
foo1 (uint32_t a, uint8x16_t b, mve_pred16_t p)
{
return vaddvaq_p (a, b, p);
}
-/* { dg-final { scan-assembler "vaddvat.u8" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvat.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
+uint32_t
+foo2 (uint8x16_t b, mve_pred16_t p)
+{
+ return vaddvaq_p (1, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c
index 5f6a8cf..1b9af18 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vaddva.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
foo (int32_t a, int16x8_t b)
{
return vaddvaq_s16 (a, b);
}
-/* { dg-final { scan-assembler "vaddva.s16" } } */
+/*
+**foo1:
+** ...
+** vaddva.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
foo1 (int32_t a, int16x8_t b)
{
return vaddvaq (a, b);
}
-/* { dg-final { scan-assembler "vaddva.s16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c
index 29e27f5..e254879 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vaddva.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
foo (int32_t a, int32x4_t b)
{
return vaddvaq_s32 (a, b);
}
-/* { dg-final { scan-assembler "vaddva.s32" } } */
+/*
+**foo1:
+** ...
+** vaddva.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
foo1 (int32_t a, int32x4_t b)
{
return vaddvaq (a, b);
}
-/* { dg-final { scan-assembler "vaddva.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c
index cac4346..d37c916 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vaddva.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
foo (int32_t a, int8x16_t b)
{
return vaddvaq_s8 (a, b);
}
-/* { dg-final { scan-assembler "vaddva.s8" } } */
+/*
+**foo1:
+** ...
+** vaddva.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
foo1 (int32_t a, int8x16_t b)
{
return vaddvaq (a, b);
}
-/* { dg-final { scan-assembler "vaddva.s8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c
index c943fa5..b3583ce 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c
@@ -1,21 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vaddva.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
foo (uint32_t a, uint16x8_t b)
{
return vaddvaq_u16 (a, b);
}
-/* { dg-final { scan-assembler "vaddva.u16" } } */
+/*
+**foo1:
+** ...
+** vaddva.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
foo1 (uint32_t a, uint16x8_t b)
{
return vaddvaq (a, b);
}
-/* { dg-final { scan-assembler "vaddva.u16" } } */
+/*
+**foo2:
+** ...
+** vaddva.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
+uint32_t
+foo2 (uint16x8_t b)
+{
+ return vaddvaq (1, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c
index 0950ff5..006c0a3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c
@@ -1,21 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vaddva.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
foo (uint32_t a, uint32x4_t b)
{
return vaddvaq_u32 (a, b);
}
-/* { dg-final { scan-assembler "vaddva.u32" } } */
+/*
+**foo1:
+** ...
+** vaddva.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
foo1 (uint32_t a, uint32x4_t b)
{
return vaddvaq (a, b);
}
-/* { dg-final { scan-assembler "vaddva.u32" } } */
+/*
+**foo2:
+** ...
+** vaddva.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
+uint32_t
+foo2 (uint32x4_t b)
+{
+ return vaddvaq (1, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c
index 2a58225..cfe29bf 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c
@@ -1,21 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vaddva.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
foo (uint32_t a, uint8x16_t b)
{
return vaddvaq_u8 (a, b);
}
-/* { dg-final { scan-assembler "vaddva.u8" } } */
+/*
+**foo1:
+** ...
+** vaddva.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
foo1 (uint32_t a, uint8x16_t b)
{
return vaddvaq (a, b);
}
-/* { dg-final { scan-assembler "vaddva.u8" } } */
+/*
+**foo2:
+** ...
+** vaddva.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
+uint32_t
+foo2 (uint8x16_t b)
+{
+ return vaddvaq (1, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c
index a786b89..3d19b46 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvt.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
foo (int16x8_t a, mve_pred16_t p)
{
return vaddvq_p_s16 (a, p);
}
-/* { dg-final { scan-assembler "vaddvt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvt.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
foo1 (int16x8_t a, mve_pred16_t p)
{
return vaddvq_p (a, p);
}
-/* { dg-final { scan-assembler "vaddvt.s16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c
index c688782..a148d15 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvt.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
foo (int32x4_t a, mve_pred16_t p)
{
return vaddvq_p_s32 (a, p);
}
-/* { dg-final { scan-assembler "vaddvt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvt.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
foo1 (int32x4_t a, mve_pred16_t p)
{
return vaddvq_p (a, p);
}
-/* { dg-final { scan-assembler "vaddvt.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c
index 8438448..f0b0c49 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvt.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
foo (int8x16_t a, mve_pred16_t p)
{
return vaddvq_p_s8 (a, p);
}
-/* { dg-final { scan-assembler "vaddvt.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvt.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
foo1 (int8x16_t a, mve_pred16_t p)
{
return vaddvq_p (a, p);
}
-/* { dg-final { scan-assembler "vaddvt.s8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c
index ec7a5fa..2fb316c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvt.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
foo (uint16x8_t a, mve_pred16_t p)
{
return vaddvq_p_u16 (a, p);
}
-/* { dg-final { scan-assembler "vaddvt.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvt.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
foo1 (uint16x8_t a, mve_pred16_t p)
{
return vaddvq_p (a, p);
}
-/* { dg-final { scan-assembler "vaddvt.u16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c
index b709688..24bde90 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvt.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
foo (uint32x4_t a, mve_pred16_t p)
{
return vaddvq_p_u32 (a, p);
}
-/* { dg-final { scan-assembler "vaddvt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvt.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
foo1 (uint32x4_t a, mve_pred16_t p)
{
return vaddvq_p (a, p);
}
-/* { dg-final { scan-assembler "vaddvt.u32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c
index 69381b7..f671094 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvt.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
foo (uint8x16_t a, mve_pred16_t p)
{
return vaddvq_p_u8 (a, p);
}
-/* { dg-final { scan-assembler "vaddvt.u8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vaddvt.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
foo1 (uint8x16_t a, mve_pred16_t p)
{
return vaddvq_p (a, p);
}
-/* { dg-final { scan-assembler "vaddvt.u8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c
index b4fc11f..6b9a99f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c
@@ -1,21 +1,33 @@
-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vaddv.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
foo (int16x8_t a)
{
return vaddvq_s16 (a);
}
-/* { dg-final { scan-assembler "vaddv.s16" } } */
+/*
+**foo1:
+** ...
+** vaddv.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
foo1 (int16x8_t a)
{
- return vaddvq_s16 (a);
+ return vaddvq (a);
}
-/* { dg-final { scan-assembler "vaddv.s16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c
index 438b46e..50823b6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c
@@ -1,21 +1,33 @@
-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vaddv.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
foo (int32x4_t a)
{
return vaddvq_s32 (a);
}
-/* { dg-final { scan-assembler "vaddv.s32" } } */
+/*
+**foo1:
+** ...
+** vaddv.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
foo1 (int32x4_t a)
{
- return vaddvq_s32 (a);
+ return vaddvq (a);
}
-/* { dg-final { scan-assembler "vaddv.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c
index b60b1f2..131edbe 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c
@@ -1,21 +1,33 @@
-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vaddv.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
foo (int8x16_t a)
{
return vaddvq_s8 (a);
}
-/* { dg-final { scan-assembler "vaddv.s8" } } */
+/*
+**foo1:
+** ...
+** vaddv.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
foo1 (int8x16_t a)
{
return vaddvq (a);
}
-/* { dg-final { scan-assembler "vaddv.s8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c
index de78212..7c0ac0e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vaddv.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
foo (uint16x8_t a)
{
- return vaddvq_u16 (a);
+ return vaddvq_u16 (a);
}
-/* { dg-final { scan-assembler "vaddv.u16" } } */
+/*
+**foo1:
+** ...
+** vaddv.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
foo1 (uint16x8_t a)
{
- return vaddvq (a);
+ return vaddvq (a);
}
-/* { dg-final { scan-assembler "vaddv.u16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c
index c4672e4..40779ed 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vaddv.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
foo (uint32x4_t a)
{
- return vaddvq_u32 (a);
+ return vaddvq_u32 (a);
}
-/* { dg-final { scan-assembler "vaddv.u32" } } */
+/*
+**foo1:
+** ...
+** vaddv.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
foo1 (uint32x4_t a)
{
- return vaddvq (a);
+ return vaddvq (a);
}
-/* { dg-final { scan-assembler "vaddv.u32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c
index e4e149c..d2a6ba8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vaddv.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
foo (uint8x16_t a)
{
- return vaddvq_u8 (a);
+ return vaddvq_u8 (a);
}
-/* { dg-final { scan-assembler "vaddv.u8" } } */
+/*
+**foo1:
+** ...
+** vaddv.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
foo1 (uint8x16_t a)
{
- return vaddvq (a);
+ return vaddvq (a);
}
-/* { dg-final { scan-assembler "vaddv.u8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file