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| author | Iain Sandoe <iain@codesourcery.com> | 2013-09-29 19:34:58 +0000 |
|---|---|---|
| committer | Iain Sandoe <iains@gcc.gnu.org> | 2013-09-29 19:34:58 +0000 |
| commit | 749278c58dee4d197d9cb951eb524f9159184c4c (patch) | |
| tree | 7d5fe66a6064c45faff1d129f54f0c6aaa77a68d | |
| parent | 23b740dbc743a7af498c0b55542fcecfff72dd86 (diff) | |
| download | gcc-749278c58dee4d197d9cb951eb524f9159184c4c.zip gcc-749278c58dee4d197d9cb951eb524f9159184c4c.tar.gz gcc-749278c58dee4d197d9cb951eb524f9159184c4c.tar.bz2 | |
rs6000.c (rs6000_init_dwarf_reg_sizes_extra): Ensure that altivec registers are correctly sized on Darwin.
gcc:
* config/rs6000/rs6000.c (rs6000_init_dwarf_reg_sizes_extra): Ensure
that altivec registers are correctly sized on Darwin.
From-SVN: r203018
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.c | 21 |
2 files changed, 26 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 57edfbb..543d601 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2013-09-29 Iain Sandoe <iain@codesourcery.com> + * config/rs6000/rs6000.c (rs6000_init_dwarf_reg_sizes_extra): Ensure + that altivec registers are correctly sized on Darwin. + +2013-09-29 Iain Sandoe <iain@codesourcery.com> + * config/t-darwin (darwin.o, darwin-c.o, darwin-f.o, darwin-driver.o): Use COMPILE and POSTCOMPILE. * config/x-darwin (host-darwin.o): Likewise. diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 4197687..763847c 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -29050,6 +29050,27 @@ rs6000_init_dwarf_reg_sizes_extra (tree address) emit_move_insn (adjust_address (mem, mode, offset), value); } } + + if (TARGET_MACHO && ! TARGET_ALTIVEC) + { + int i; + enum machine_mode mode = TYPE_MODE (char_type_node); + rtx addr = expand_expr (address, NULL_RTX, VOIDmode, EXPAND_NORMAL); + rtx mem = gen_rtx_MEM (BLKmode, addr); + rtx value = gen_int_mode (16, mode); + + /* On Darwin, libgcc may be built to run on both G3 and G4/5. + The unwinder still needs to know the size of Altivec registers. */ + + for (i = FIRST_ALTIVEC_REGNO; i < LAST_ALTIVEC_REGNO+1; i++) + { + int column = DWARF_REG_TO_UNWIND_COLUMN (i); + HOST_WIDE_INT offset + = DWARF_FRAME_REGNUM (column) * GET_MODE_SIZE (mode); + + emit_move_insn (adjust_address (mem, mode, offset), value); + } + } } /* Map internal gcc register numbers to DWARF2 register numbers. */ |