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| author | Juzhe-Zhong <juzhe.zhong@rivai.ai> | 2023-08-10 16:55:18 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2023-08-10 20:21:34 +0800 |
| commit | 6bdbf1722a312b90a48dea19af545815f0069e86 (patch) | |
| tree | c9dac67228266c40cbce9e7d0ea8a802de4bc72f | |
| parent | d5ad55a83d504df582d1e6f1c168454a028c0437 (diff) | |
| download | gcc-6bdbf1722a312b90a48dea19af545815f0069e86.zip gcc-6bdbf1722a312b90a48dea19af545815f0069e86.tar.gz gcc-6bdbf1722a312b90a48dea19af545815f0069e86.tar.bz2 | |
RISC-V: Add missing modes to the iterators
gcc/ChangeLog:
* config/riscv/vector-iterators.md: Add missing modes.
| -rw-r--r-- | gcc/config/riscv/vector-iterators.md | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/gcc/config/riscv/vector-iterators.md b/gcc/config/riscv/vector-iterators.md index 1482998..30808ce 100644 --- a/gcc/config/riscv/vector-iterators.md +++ b/gcc/config/riscv/vector-iterators.md @@ -468,6 +468,7 @@ (RVVM8DF "TARGET_VECTOR_ELEN_FP_64") (RVVM4DF "TARGET_VECTOR_ELEN_FP_64") (RVVM2DF "TARGET_VECTOR_ELEN_FP_64") (RVVM1DF "TARGET_VECTOR_ELEN_FP_64") + (V1HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16") (V2HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16") (V4HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16") (V8HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16") @@ -479,6 +480,7 @@ (V512HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024") (V1024HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048") (V2048HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096") + (V1SF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_32") (V2SF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_32") (V4SF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_32") (V8SF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_32") @@ -489,6 +491,7 @@ (V256SF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024") (V512SF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048") (V1024SF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096") + (V1DF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_64") (V2DF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_64") (V4DF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_64") (V8DF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64") |