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author | Pan Li <pan2.li@intel.com> | 2023-06-01 19:10:04 +0800 |
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committer | Pan Li <pan2.li@intel.com> | 2023-06-02 09:08:46 +0800 |
commit | 691805ff8aa4cba5bded97821b61750a07b31ca4 (patch) | |
tree | 0b5b2e4756ebab1e313d06a97eb7e6329ba91180 | |
parent | d5ea84cdd9a45e83b144442cdf9eb50efea9e28e (diff) | |
download | gcc-691805ff8aa4cba5bded97821b61750a07b31ca4.zip gcc-691805ff8aa4cba5bded97821b61750a07b31ca4.tar.gz gcc-691805ff8aa4cba5bded97821b61750a07b31ca4.tar.bz2 |
RISC-V: Add test for vfloat16*_t (non tuple) types
This patch would like to add some test cases of vfloat16*_t (non tuple),
no 'zvfh' or 'zvfhmin' will meet unknown type.
Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/abi-16.c: Add test cases.
* gcc.target/riscv/rvv/base/user-7.c: Likewise.
-rw-r--r-- | gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c | 6 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/riscv/rvv/base/user-7.c | 6 |
2 files changed, 12 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c index be2cbb5..9e962a7 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c @@ -173,6 +173,12 @@ void f___rvv_int64m2x4_t () {__rvv_int64m2x4_t t;} /* { dg-error {unknown type n void f___rvv_uint64m2x4_t () {__rvv_uint64m2x4_t t;} /* { dg-error {unknown type name '__rvv_uint64m2x4_t'} } */ void f___rvv_int64m4x2_t () {__rvv_int64m4x2_t t;} /* { dg-error {unknown type name '__rvv_int64m4x2_t'} } */ void f___rvv_uint64m4x2_t () {__rvv_uint64m4x2_t t;} /* { dg-error {unknown type name '__rvv_uint64m4x2_t'} } */ +void f___rvv_float16mf4_t () {__rvv_float16mf4_t t;} /* { dg-error {unknown type name '__rvv_float16mf4_t'} } */ +void f___rvv_float16mf2_t () {__rvv_float16mf2_t t;} /* { dg-error {unknown type name '__rvv_float16mf2_t'} } */ +void f___rvv_float16m1_t () {__rvv_float16m1_t t;} /* { dg-error {unknown type name '__rvv_float16m1_t'} } */ +void f___rvv_float16m2_t () {__rvv_float16m2_t t;} /* { dg-error {unknown type name '__rvv_float16m2_t'} } */ +void f___rvv_float16m4_t () {__rvv_float16m4_t t;} /* { dg-error {unknown type name '__rvv_float16m4_t'} } */ +void f___rvv_float16m8_t () {__rvv_float16m8_t t;} /* { dg-error {unknown type name '__rvv_float16m8_t'} } */ void f___rvv_float32mf2x2_t () {__rvv_float32mf2x2_t t;} void f___rvv_float32mf2x3_t () {__rvv_float32mf2x3_t t;} void f___rvv_float32mf2x4_t () {__rvv_float32mf2x4_t t;} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/user-7.c b/gcc/testsuite/gcc.target/riscv/rvv/base/user-7.c index 2172a5c..0620a72 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/user-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/user-7.c @@ -173,6 +173,12 @@ void f_vint64m2x4_t () {vint64m2x4_t t;} /* { dg-error {unknown type name 'vint6 void f_vuint64m2x4_t () {vuint64m2x4_t t;} /* { dg-error {unknown type name 'vuint64m2x4_t'} } */ void f_vint64m4x2_t () {vint64m4x2_t t;} /* { dg-error {unknown type name 'vint64m4x2_t'} } */ void f_vuint64m4x2_t () {vuint64m4x2_t t;} /* { dg-error {unknown type name 'vuint64m4x2_t'} } */ +void f_vfloat16mf4_t () {vfloat16mf4_t t;} /* { dg-error {unknown type name 'vfloat16mf4_t'} } */ +void f_vfloat16mf2_t () {vfloat16mf2_t t;} /* { dg-error {unknown type name 'vfloat16mf2_t'} } */ +void f_vfloat16m1_t () {vfloat16m1_t t;} /* { dg-error {unknown type name 'vfloat16m1_t'} } */ +void f_vfloat16m2_t () {vfloat16m2_t t;} /* { dg-error {unknown type name 'vfloat16m2_t'} } */ +void f_vfloat16m4_t () {vfloat16m4_t t;} /* { dg-error {unknown type name 'vfloat16m4_t'} } */ +void f_vfloat16m8_t () {vfloat16m8_t t;} /* { dg-error {unknown type name 'vfloat16m8_t'} } */ void f_vfloat32mf2x2_t () {vfloat32mf2x2_t t;} /* { dg-error {unknown type name 'vfloat32mf2x2_t'} } */ void f_vfloat32mf2x3_t () {vfloat32mf2x3_t t;} /* { dg-error {unknown type name 'vfloat32mf2x3_t'} } */ void f_vfloat32mf2x4_t () {vfloat32mf2x4_t t;} /* { dg-error {unknown type name 'vfloat32mf2x4_t'} } */ |