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authorJoseph Myers <joseph@codesourcery.com>2004-11-14 00:38:32 +0000
committerJoseph Myers <jsm28@gcc.gnu.org>2004-11-14 00:38:32 +0000
commit6716ecbcfd3ddc82cd4460a9894dd14b9d6bb943 (patch)
tree0caec119f4a974759e5c28af95d69bc41fcfddfe
parentf7b62acd2a2856955a15ff3cd5fce547ebb25e30 (diff)
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i386.c (override_options): Move loop to set default tuning to correct place.
* config/i386/i386.c (override_options): Move loop to set default tuning to correct place. From-SVN: r90606
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/i386/i386.c26
2 files changed, 18 insertions, 13 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ba8cdf2..a98165b 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2004-11-14 Joseph Myers <joseph@codesourcery.com>
+
+ * config/i386/i386.c (override_options): Move loop to set default
+ tuning to correct place.
+
2004-11-13 Zak Kipling <zak@transversal.com>
PR target/18300
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 089957e..9978637 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -1306,6 +1306,19 @@ override_options (void)
if (processor_alias_table[i].flags & PTA_PREFETCH_SSE)
x86_prefetch_sse = true;
if (TARGET_64BIT && !(processor_alias_table[i].flags & PTA_64BIT))
+ error ("CPU you selected does not support x86-64 "
+ "instruction set");
+ break;
+ }
+
+ if (i == pta_size)
+ error ("bad value (%s) for -march= switch", ix86_arch_string);
+
+ for (i = 0; i < pta_size; i++)
+ if (! strcmp (ix86_tune_string, processor_alias_table[i].name))
+ {
+ ix86_tune = processor_alias_table[i].processor;
+ if (TARGET_64BIT && !(processor_alias_table[i].flags & PTA_64BIT))
{
if (ix86_tune_defaulted)
{
@@ -1320,19 +1333,6 @@ override_options (void)
error ("CPU you selected does not support x86-64 "
"instruction set");
}
- break;
- }
-
- if (i == pta_size)
- error ("bad value (%s) for -march= switch", ix86_arch_string);
-
- for (i = 0; i < pta_size; i++)
- if (! strcmp (ix86_tune_string, processor_alias_table[i].name))
- {
- ix86_tune = processor_alias_table[i].processor;
- if (TARGET_64BIT && !(processor_alias_table[i].flags & PTA_64BIT))
- error ("CPU you selected does not support x86-64 instruction set");
-
/* Intel CPUs have always interpreted SSE prefetch instructions as
NOPs; so, we can enable SSE prefetch instructions even when
-mtune (rather than -march) points us to a processor that has them.