diff options
author | Carl Love <cel@linux.ibm.com> | 2024-07-09 13:17:28 -0400 |
---|---|---|
committer | Carl Love <cel@linux.ibm.com> | 2024-07-09 13:34:39 -0400 |
commit | 6031e34af130d114a7a3de0108fdb39360e8b1b3 (patch) | |
tree | ab57d3eb9ac48ce753ceb437a812c43666478501 | |
parent | 224cc560a6ac19c9454038efe6230096b46f4806 (diff) | |
download | gcc-6031e34af130d114a7a3de0108fdb39360e8b1b3.zip gcc-6031e34af130d114a7a3de0108fdb39360e8b1b3.tar.gz gcc-6031e34af130d114a7a3de0108fdb39360e8b1b3.tar.bz2 |
rs6000, fix error in unsigned vector float to unsigned int built-in definitions
The built-in __builtin_vsx_vunsigned_v2df is supposed to take a vector of
doubles and return a vector of unsigned long long ints. Similarly
__builtin_vsx_vunsigned_v4sf takes a vector of floats an is supposed to
return a vector of unsinged ints. The definitions are using the signed
version of the instructions not the unsigned version of the instruction.
The results should also be unsigned. The built-ins are used by the
overloaded vec_unsigned built-in which has an unsigned result.
Similarly the built-ins __builtin_vsx_vunsignede_v2df and
__builtin_vsx_vunsignedo_v2df are supposed to return an unsigned result.
If the floating point argument is negative, the unsigned result is zero.
The built-ins are used in the overloaded built-in vec_unsignede and
vec_unsignedo respectively.
Add a test cases for a negative floating point arguments for each of the
above built-ins.
gcc/ChangeLog:
* config/rs6000/rs6000-builtins.def (__builtin_vsx_vunsigned_v2df,
__builtin_vsx_vunsigned_v4sf, __builtin_vsx_vunsignede_v2df,
__builtin_vsx_vunsignedo_v2df): Change the result type to unsigned.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/builtins-3-runnable.c: Add tests for
vec_unsignede and vec_unsignedo with negative arguments.
-rw-r--r-- | gcc/config/rs6000/rs6000-builtins.def | 12 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/builtins-3-runnable.c | 30 |
2 files changed, 33 insertions, 9 deletions
diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def index 465a430..f0aee29 100644 --- a/gcc/config/rs6000/rs6000-builtins.def +++ b/gcc/config/rs6000/rs6000-builtins.def @@ -1580,16 +1580,16 @@ const vsi __builtin_vsx_vsignedo_v2df (vd); VEC_VSIGNEDO_V2DF vsignedo_v2df {} - const vsll __builtin_vsx_vunsigned_v2df (vd); - VEC_VUNSIGNED_V2DF vsx_xvcvdpsxds {} + const vull __builtin_vsx_vunsigned_v2df (vd); + VEC_VUNSIGNED_V2DF vsx_xvcvdpuxds {} - const vsi __builtin_vsx_vunsigned_v4sf (vf); - VEC_VUNSIGNED_V4SF vsx_xvcvspsxws {} + const vui __builtin_vsx_vunsigned_v4sf (vf); + VEC_VUNSIGNED_V4SF vsx_xvcvspuxws {} - const vsi __builtin_vsx_vunsignede_v2df (vd); + const vui __builtin_vsx_vunsignede_v2df (vd); VEC_VUNSIGNEDE_V2DF vunsignede_v2df {} - const vsi __builtin_vsx_vunsignedo_v2df (vd); + const vui __builtin_vsx_vunsignedo_v2df (vd); VEC_VUNSIGNEDO_V2DF vunsignedo_v2df {} const vf __builtin_vsx_xscvdpsp (double); diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-3-runnable.c b/gcc/testsuite/gcc.target/powerpc/builtins-3-runnable.c index 0231a1f..5dcdfbe 100644 --- a/gcc/testsuite/gcc.target/powerpc/builtins-3-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/builtins-3-runnable.c @@ -313,6 +313,14 @@ int main() test_unsigned_int_result (ALL, vec_uns_int_result, vec_uns_int_expected); + /* Convert single precision float to unsigned int. Negative + arguments. */ + vec_flt0 = (vector float){-14.930, -834.49, -3.3, -5.4}; + vec_uns_int_expected = (vector unsigned int){0, 0, 0, 0}; + vec_uns_int_result = vec_unsigned (vec_flt0); + test_unsigned_int_result (ALL, vec_uns_int_result, + vec_uns_int_expected); + /* Convert double precision float to long long unsigned int */ vec_dble0 = (vector double){124.930, 8134.49}; vec_ll_uns_int_expected = (vector long long unsigned int){124, 8134}; @@ -320,10 +328,18 @@ int main() test_ll_unsigned_int_result (vec_ll_uns_int_result, vec_ll_uns_int_expected); + /* Convert double precision float to long long unsigned int. Negative + arguments. */ + vec_dble0 = (vector double){-24.93, -134.9}; + vec_ll_uns_int_expected = (vector long long unsigned int){0, 0}; + vec_ll_uns_int_result = vec_unsigned (vec_dble0); + test_ll_unsigned_int_result (vec_ll_uns_int_result, + vec_ll_uns_int_expected); + /* Convert double precision vector float to vector unsigned int, - even words */ - vec_dble0 = (vector double){3124.930, 8234.49}; - vec_uns_int_expected = (vector unsigned int){3124, 0, 8234, 0}; + even words. Negative arguments */ + vec_dble0 = (vector double){-124.930, -234.49}; + vec_uns_int_expected = (vector unsigned int){0, 0, 0, 0}; vec_uns_int_result = vec_unsignede (vec_dble0); test_unsigned_int_result (EVEN, vec_uns_int_result, vec_uns_int_expected); @@ -335,5 +351,13 @@ int main() vec_uns_int_result = vec_unsignedo (vec_dble0); test_unsigned_int_result (ODD, vec_uns_int_result, vec_uns_int_expected); + + /* Convert double precision vector float to vector unsigned int, + odd words. Negative arguments. */ + vec_dble0 = (vector double){-924.930, -1234.49}; + vec_uns_int_expected = (vector unsigned int){0, 0, 0, 0}; + vec_uns_int_result = vec_unsignedo (vec_dble0); + test_unsigned_int_result (ODD, vec_uns_int_result, + vec_uns_int_expected); } |