re PR target/84335 (ICE on invalid code in copy_to_mode_reg, at explow.c:612)

	PR target/84335
	* config/i386/i386.c (ix86_init_mmx_sse_builtins): Pass
	OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2 instead of
	OPTION_MASK_ISA_AES as first argument to def_builtin_const
	for AES builtins.  Pass OPTION_MASK_ISA_PCLMUL | OPTION_MASK_ISA_SSE2
	instead of OPTION_MASK_ISA_PCLMUL as first argument to
	def_builtin_const for __builtin_ia32_pclmulqdq128 builtin.
	* config/i386/wmmintrin.h: If __SSE2__ is not defined, enable it
	temporarily for AES and PCLMUL builtins.

	* gcc.target/i386/pr84335.c: New test.

From-SVN: r257619

5 files changed, 41 insertions, 11 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 325eea6..6ed2b5c 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,15 @@
 2018-02-13  Jakub Jelinek  <jakub@redhat.com>
 
+	PR target/84335
+	* config/i386/i386.c (ix86_init_mmx_sse_builtins): Pass
+	OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2 instead of
+	OPTION_MASK_ISA_AES as first argument to def_builtin_const
+	for AES builtins.  Pass OPTION_MASK_ISA_PCLMUL | OPTION_MASK_ISA_SSE2
+	instead of OPTION_MASK_ISA_PCLMUL as first argument to
+	def_builtin_const for __builtin_ia32_pclmulqdq128 builtin.
+	* config/i386/wmmintrin.h: If __SSE2__ is not defined, enable it
+	temporarily for AES and PCLMUL builtins.
+
 	PR tree-optimization/84339
 	* gimple-fold.c (get_range_strlen): Set *FLEXP to true when handling
 	ARRAY_REF where first operand is array_at_struct_end_p COMPONENT_REF.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index a870997..020eef9 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -31282,21 +31282,28 @@ ix86_init_mmx_sse_builtins (void)
 	       VOID_FTYPE_UNSIGNED_UNSIGNED, IX86_BUILTIN_MWAIT);
 
   /* AES */
-  def_builtin_const (OPTION_MASK_ISA_AES, "__builtin_ia32_aesenc128",
+  def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2,
+		     "__builtin_ia32_aesenc128",
 		     V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESENC128);
-  def_builtin_const (OPTION_MASK_ISA_AES, "__builtin_ia32_aesenclast128",
+  def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2,
+		     "__builtin_ia32_aesenclast128",
 		     V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESENCLAST128);
-  def_builtin_const (OPTION_MASK_ISA_AES, "__builtin_ia32_aesdec128",
+  def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2,
+		     "__builtin_ia32_aesdec128",
 		     V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESDEC128);
-  def_builtin_const (OPTION_MASK_ISA_AES, "__builtin_ia32_aesdeclast128",
+  def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2,
+		     "__builtin_ia32_aesdeclast128",
 		     V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESDECLAST128);
-  def_builtin_const (OPTION_MASK_ISA_AES, "__builtin_ia32_aesimc128",
+  def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2,
+		     "__builtin_ia32_aesimc128",
 		     V2DI_FTYPE_V2DI, IX86_BUILTIN_AESIMC128);
-  def_builtin_const (OPTION_MASK_ISA_AES, "__builtin_ia32_aeskeygenassist128",
+  def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2,
+		     "__builtin_ia32_aeskeygenassist128",
 		     V2DI_FTYPE_V2DI_INT, IX86_BUILTIN_AESKEYGENASSIST128);
 
   /* PCLMUL */
-  def_builtin_const (OPTION_MASK_ISA_PCLMUL, "__builtin_ia32_pclmulqdq128",
+  def_builtin_const (OPTION_MASK_ISA_PCLMUL | OPTION_MASK_ISA_SSE2,
+		     "__builtin_ia32_pclmulqdq128",
 		     V2DI_FTYPE_V2DI_V2DI_INT, IX86_BUILTIN_PCLMULQDQ128);
 
   /* RDRND */
diff --git a/gcc/config/i386/wmmintrin.h b/gcc/config/i386/wmmintrin.h
index 5eabf69..61837f3 100644
--- a/gcc/config/i386/wmmintrin.h
+++ b/gcc/config/i386/wmmintrin.h
@@ -32,9 +32,9 @@
 
 /* AES */
 
-#ifndef __AES__
+#if !defined(__AES__) || !defined(__SSE2__)
 #pragma GCC push_options
-#pragma GCC target("aes")
+#pragma GCC target("aes,sse2")
 #define __DISABLE_AES__
 #endif /* __AES__ */
 
@@ -101,9 +101,9 @@ _mm_aeskeygenassist_si128 (__m128i __X, const int __C)
 
 /* PCLMUL */
 
-#ifndef __PCLMUL__
+#if !defined(__PCLMUL__) || !defined(__SSE2__)
 #pragma GCC push_options
-#pragma GCC target("pclmul")
+#pragma GCC target("pclmul,sse2")
 #define __DISABLE_PCLMUL__
 #endif /* __PCLMUL__ */
 
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index cbe0b84..878a78e 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,8 @@
 2018-02-13  Jakub Jelinek  <jakub@redhat.com>
 
+	PR target/84335
+	* gcc.target/i386/pr84335.c: New test.
+
 	PR tree-optimization/84339
 	* gcc.c-torture/execute/pr84339.c: New test.
 
diff --git a/gcc/testsuite/gcc.target/i386/pr84335.c b/gcc/testsuite/gcc.target/i386/pr84335.c
new file mode 100644
index 0000000..c8d2a71
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr84335.c
@@ -0,0 +1,10 @@
+/* PR target/84335 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -maes -mno-sse2" } */
+typedef long long V __attribute__ ((__vector_size__ (16)));
+
+V
+foo (V *a, V *b)
+{
+  return __builtin_ia32_aesenc128 (*a, *b);	/* { dg-error "needs isa option" } */
+}