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| author | Edwin Lu <ewlu@rivosinc.com> | 2024-07-16 17:43:45 -0700 |
|---|---|---|
| committer | Edwin Lu <ewlu@rivosinc.com> | 2024-07-17 10:19:23 -0700 |
| commit | 5bb01e91d40c34e8f8230b142f7ebff3d6aa88d1 (patch) | |
| tree | 2376e05eb20962fe45981e905b77bbb7aefb38b1 | |
| parent | 44fcc1ca11e7ea35dc9fb25a5317346bc1eaf7b2 (diff) | |
| download | gcc-5bb01e91d40c34e8f8230b142f7ebff3d6aa88d1.zip gcc-5bb01e91d40c34e8f8230b142f7ebff3d6aa88d1.tar.gz gcc-5bb01e91d40c34e8f8230b142f7ebff3d6aa88d1.tar.bz2 | |
RISC-V: Fix testcase missing arch attribute
The C + F extention implies the zcf extension on rv32. Add missing zcf
extension for the rv32 target.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/target-attr-16.c: Update expected assembly
Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
| -rw-r--r-- | gcc/testsuite/gcc.target/riscv/target-attr-16.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/testsuite/gcc.target/riscv/target-attr-16.c b/gcc/testsuite/gcc.target/riscv/target-attr-16.c index 1c7badc..c6b626d 100644 --- a/gcc/testsuite/gcc.target/riscv/target-attr-16.c +++ b/gcc/testsuite/gcc.target/riscv/target-attr-16.c @@ -24,5 +24,5 @@ void bar (void) { } -/* { dg-final { scan-assembler-times ".option arch, rv32i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_zicsr2p0_zifencei2p0_zaamo1p0_zalrsc1p0_zca1p0_zcd1p0_zba1p0_zbb1p0" 4 { target { rv32 } } } } */ +/* { dg-final { scan-assembler-times ".option arch, rv32i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_zicsr2p0_zifencei2p0_zaamo1p0_zalrsc1p0_zca1p0_zcd1p0_zcf1p0_zba1p0_zbb1p0" 4 { target { rv32 } } } } */ /* { dg-final { scan-assembler-times ".option arch, rv64i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_zicsr2p0_zifencei2p0_zaamo1p0_zalrsc1p0_zca1p0_zcd1p0_zba1p0_zbb1p0" 4 { target { rv64 } } } } */ |