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| author | Juzhe-Zhong <juzhe.zhong@rivai.ai> | 2023-10-10 20:15:35 +0800 |
|---|---|---|
| committer | Lehua Ding <lehua.ding@rivai.ai> | 2023-10-10 20:22:21 +0800 |
| commit | 5255273ee8b14ea565eb43f067a86370d25df114 (patch) | |
| tree | 72092cdee6d078dc0735d4225ee6934523c7ebf1 | |
| parent | 70b5c6981fcdff246f90e57e91f3e1667eab2eb3 (diff) | |
| download | gcc-5255273ee8b14ea565eb43f067a86370d25df114.zip gcc-5255273ee8b14ea565eb43f067a86370d25df114.tar.gz gcc-5255273ee8b14ea565eb43f067a86370d25df114.tar.bz2 | |
RISC-V: Add VLS BOOL mode vcond_mask[PR111751]
Richard patch resolve PR111751: https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=7c76c876e917a1f20a788f602cc78fff7d0a2a65
which cause ICE in RISC-V regression:
FAIL: gcc.dg/torture/pr53144.c -O2 (internal compiler error: in gimple_expand_vec_cond_expr, at gimple-isel.cc:328)
FAIL: gcc.dg/torture/pr53144.c -O2 (test for excess errors)
FAIL: gcc.dg/torture/pr53144.c -O2 -flto -fno-use-linker-plugin -flto-partition=none (internal compiler error: in gimple_expand_vec_cond_expr, at gimple-isel.cc:328)
FAIL: gcc.dg/torture/pr53144.c -O2 -flto -fno-use-linker-plugin -flto-partition=none (test for excess errors)
FAIL: gcc.dg/torture/pr53144.c -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions (internal compiler error: in gimple_expand_vec_cond_expr, at gimple-isel.cc:328)
FAIL: gcc.dg/torture/pr53144.c -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions (test for excess errors)
FAIL: gcc.dg/torture/pr53144.c -O3 -g (internal compiler error: in gimple_expand_vec_cond_expr, at gimple-isel.cc:328)
FAIL: gcc.dg/torture/pr53144.c -O3 -g (test for excess errors)
VLS BOOL modes vcond_mask is needed to fix this regression ICE.
More details: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111751
Tested and Committed.
PR target/111751
gcc/ChangeLog:
* config/riscv/autovec.md: Add VLS BOOL modes.
| -rw-r--r-- | gcc/config/riscv/autovec.md | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/gcc/config/riscv/autovec.md b/gcc/config/riscv/autovec.md index 53e9d34..41bff3a 100644 --- a/gcc/config/riscv/autovec.md +++ b/gcc/config/riscv/autovec.md @@ -575,10 +575,10 @@ ;; ------------------------------------------------------------------------- (define_expand "vcond_mask_<mode><mode>" - [(match_operand:VB 0 "register_operand") - (match_operand:VB 1 "register_operand") - (match_operand:VB 2 "register_operand") - (match_operand:VB 3 "register_operand")] + [(match_operand:VB_VLS 0 "register_operand") + (match_operand:VB_VLS 1 "register_operand") + (match_operand:VB_VLS 2 "register_operand") + (match_operand:VB_VLS 3 "register_operand")] "TARGET_VECTOR" { /* mask1 = operands[3] & operands[1]. */ |