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| author | Lehua Ding <lehua.ding@rivai.ai> | 2023-06-20 17:45:17 +0800 |
|---|---|---|
| committer | Robin Dapp <rdapp@ventanamicro.com> | 2023-06-20 15:04:19 +0200 |
| commit | 4a6c44f4ad4198382b7c70f4d40eefb69e71132e (patch) | |
| tree | cf3bb48c3d1deb8ae2295ac6d8ea83395a4eeaed | |
| parent | 37c167e89b031df77fe3133baebf5bf362151b05 (diff) | |
| download | gcc-4a6c44f4ad4198382b7c70f4d40eefb69e71132e.zip gcc-4a6c44f4ad4198382b7c70f4d40eefb69e71132e.tar.gz gcc-4a6c44f4ad4198382b7c70f4d40eefb69e71132e.tar.bz2 | |
RISC-V: Fix compiler warning of riscv_arg_has_vector
Hi,
This little patch fixes a compile warning issue that my previous patch
introduced, sorry for introducing this issue.
Best,
Lehua
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_arg_has_vector): Add default
switch handler.
| -rw-r--r-- | gcc/config/riscv/riscv.cc | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 6eb63a9..9558e28 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -3820,8 +3820,8 @@ riscv_arg_has_vector (const_tree type) switch (TREE_CODE (type)) { case RECORD_TYPE: - /* If it is a record, it is further determined whether its fileds have - vector type. */ + /* If it is a record, it is further determined whether its fields have + vector type. */ for (tree f = TYPE_FIELDS (type); f; f = DECL_CHAIN (f)) if (TREE_CODE (f) == FIELD_DECL) { @@ -3835,6 +3835,8 @@ riscv_arg_has_vector (const_tree type) break; case ARRAY_TYPE: return riscv_arg_has_vector (TREE_TYPE (type)); + default: + break; } return false; |