RISC-V: Allow any temp register to be used in amo tests

We artifically restrict the temp registers to be a[0-9]+ when other
registers like t[0-9]+ are valid too. Update to make the regex
accept any register for the temp value.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/amo/amo-table-a-6-load-1.c: Update temp register regex.
	* gcc.target/riscv/amo/amo-table-a-6-load-2.c: Ditto.
	* gcc.target/riscv/amo/amo-table-a-6-load-3.c: Ditto.
	* gcc.target/riscv/amo/amo-table-a-6-store-1.c: Ditto.
	* gcc.target/riscv/amo/amo-table-a-6-store-2.c: Ditto.
	* gcc.target/riscv/amo/amo-table-a-6-store-compat-3.c: Ditto.
	* gcc.target/riscv/amo/amo-table-ztso-load-1.c: Ditto.
	* gcc.target/riscv/amo/amo-table-ztso-load-2.c: Ditto.
	* gcc.target/riscv/amo/amo-table-ztso-load-3.c: Ditto.
	* gcc.target/riscv/amo/amo-table-ztso-store-1.c: Ditto.
	* gcc.target/riscv/amo/amo-table-ztso-store-2.c: Ditto.
	* gcc.target/riscv/amo/amo-table-ztso-store-3.c: Ditto.

Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>

12 files changed, 24 insertions, 24 deletions

diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-1.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-1.c
index 3c79035..53dd523 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-1.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-1.c
@@ -6,8 +6,8 @@
 
 /*
 ** foo:
-**	lw\ta[0-9]+,0\(a0\)
-**	sw\ta[0-9]+,0\(a1\)
+**	lw\t[atx][0-9]+,0\(a0\)
+**	sw\t[atx][0-9]+,0\(a1\)
 **	ret
 */
 void foo (int* bar, int* baz)
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-2.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-2.c
index 7d74841..dda0f54 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-2.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-2.c
@@ -6,9 +6,9 @@
 
 /*
 ** foo:
-**	lw\ta[0-9]+,0\(a0\)
+**	lw\t[atx][0-9]+,0\(a0\)
 **	fence\tr,rw
-**	sw\ta[0-9]+,0\(a1\)
+**	sw\t[atx][0-9]+,0\(a1\)
 **	ret
 */
 void foo (int* bar, int* baz)
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-3.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-3.c
index ab95fa6..3279557 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-3.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-3.c
@@ -7,9 +7,9 @@
 /*
 ** foo:
 **	fence\trw,rw
-**	lw\ta[0-9]+,0\(a0\)
+**	lw\t[atx][0-9]+,0\(a0\)
 **	fence\tr,rw
-**	sw\ta[0-9]+,0\(a1\)
+**	sw\t[atx][0-9]+,0\(a1\)
 **	ret
 */
 void foo (int* bar, int* baz)
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-1.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-1.c
index d852fdd..6b05429 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-1.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-1.c
@@ -6,8 +6,8 @@
 
 /*
 ** foo:
-**	lw\ta[0-9]+,0\(a1\)
-**	sw\ta[0-9]+,0\(a0\)
+**	lw\t[atx][0-9]+,0\(a1\)
+**	sw\t[atx][0-9]+,0\(a0\)
 **	ret
 */
 void foo (int* bar, int* baz)
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-2.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-2.c
index ccb5e2a..1ad7ded 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-2.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-2.c
@@ -6,9 +6,9 @@
 
 /*
 ** foo:
-**	lw\ta[0-9]+,0\(a1\)
+**	lw\t[atx][0-9]+,0\(a1\)
 **	fence\trw,w
-**	sw\ta[0-9]+,0\(a0\)
+**	sw\t[atx][0-9]+,0\(a0\)
 **	ret
 */
 void foo (int* bar, int* baz)
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-compat-3.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-compat-3.c
index 761889f..b16b205 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-compat-3.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-compat-3.c
@@ -6,9 +6,9 @@
 
 /*
 ** foo:
-**	lw\ta[0-9]+,0\(a1\)
+**	lw\t[atx][0-9]+,0\(a1\)
 **	fence\trw,w
-**	sw\ta[0-9]+,0\(a0\)
+**	sw\t[atx][0-9]+,0\(a0\)
 **	fence\trw,rw
 **	ret
 */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-1.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-1.c
index 6319779..ebb0a2e1 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-1.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-1.c
@@ -7,8 +7,8 @@
 
 /*
 ** foo:
-**	lw\ta[0-9]+,0\(a0\)
-**	sw\ta[0-9]+,0\(a1\)
+**	lw\t[atx][0-9]+,0\(a0\)
+**	sw\t[atx][0-9]+,0\(a1\)
 **	ret
 */
 void foo (int* bar, int* baz)
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-2.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-2.c
index 2c24f10..c88c4be 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-2.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-2.c
@@ -7,8 +7,8 @@
 
 /*
 ** foo:
-**	lw\ta[0-9]+,0\(a0\)
-**	sw\ta[0-9]+,0\(a1\)
+**	lw\t[atx][0-9]+,0\(a0\)
+**	sw\t[atx][0-9]+,0\(a1\)
 **	ret
 */
 void foo (int* bar, int* baz)
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-3.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-3.c
index 7d2166d..8713729 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-3.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-3.c
@@ -8,8 +8,8 @@
 /*
 ** foo:
 **	fence\trw,rw
-**	lw\ta[0-9]+,0\(a0\)
-**	sw\ta[0-9]+,0\(a1\)
+**	lw\t[atx][0-9]+,0\(a0\)
+**	sw\t[atx][0-9]+,0\(a1\)
 **	ret
 */
 void foo (int* bar, int* baz)
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-1.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-1.c
index 29a7702..ca8d5ed 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-1.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-1.c
@@ -7,8 +7,8 @@
 
 /*
 ** foo:
-**	lw\ta[0-9]+,0\(a1\)
-**	sw\ta[0-9]+,0\(a0\)
+**	lw\t[atx][0-9]+,0\(a1\)
+**	sw\t[atx][0-9]+,0\(a0\)
 **	ret
 */
 void foo (int* bar, int* baz)
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-2.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-2.c
index fb82360..2395719 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-2.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-2.c
@@ -7,8 +7,8 @@
 
 /*
 ** foo:
-**	lw\ta[0-9]+,0\(a1\)
-**	sw\ta[0-9]+,0\(a0\)
+**	lw\t[atx][0-9]+,0\(a1\)
+**	sw\t[atx][0-9]+,0\(a0\)
 **	ret
 */
 void foo (int* bar, int* baz)
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-3.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-3.c
index 88d8432..11c12f0 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-3.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-3.c
@@ -7,8 +7,8 @@
 
 /*
 ** foo:
-**	lw\ta[0-9]+,0\(a1\)
-**	sw\ta[0-9]+,0\(a0\)
+**	lw\t[atx][0-9]+,0\(a1\)
+**	sw\t[atx][0-9]+,0\(a0\)
 **	fence\trw,rw
 **	ret
 */