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author | H.J. Lu <hongjiu.lu@intel.com> | 2008-05-21 17:09:32 +0000 |
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committer | H.J. Lu <hjl@gcc.gnu.org> | 2008-05-21 10:09:32 -0700 |
commit | 349587b8083a53b88f762729c18521b56ecbbba1 (patch) | |
tree | a09ebe4867d65270ec34588741723598e73ba4da | |
parent | 0864e1e889d6d9d1b17d6fffb5e00e9071ae0810 (diff) | |
download | gcc-349587b8083a53b88f762729c18521b56ecbbba1.zip gcc-349587b8083a53b88f762729c18521b56ecbbba1.tar.gz gcc-349587b8083a53b88f762729c18521b56ecbbba1.tar.bz2 |
sse.md (vec_setv4sf): Removed.
2008-05-21 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/sse.md (vec_setv4sf): Removed.
(vec_setv2df): Likewise.
(vec_setv2di): Likewise.
(vec_setv4si): Likewise.
(vec_setv8hi): Likewise.
(vec_setv16qi): Likewise.
(vec_set<mode>): New.
From-SVN: r135726
-rw-r--r-- | gcc/ChangeLog | 10 | ||||
-rw-r--r-- | gcc/config/i386/sse.md | 61 |
2 files changed, 13 insertions, 58 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 55b9968..01670ec 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,15 @@ 2008-05-21 H.J. Lu <hongjiu.lu@intel.com> + * config/i386/sse.md (vec_setv4sf): Removed. + (vec_setv2df): Likewise. + (vec_setv2di): Likewise. + (vec_setv4si): Likewise. + (vec_setv8hi): Likewise. + (vec_setv16qi): Likewise. + (vec_set<mode>): New. + +2008-05-21 H.J. Lu <hongjiu.lu@intel.com> + * config/i386/i386.c (ix86_expand_vector_init_general): Remove goto for vec_concat and vec_interleave. diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index b2aba51..2d2252c 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -2372,9 +2372,9 @@ DONE; }) -(define_expand "vec_setv4sf" - [(match_operand:V4SF 0 "register_operand" "") - (match_operand:SF 1 "register_operand" "") +(define_expand "vec_set<mode>" + [(match_operand:SSEMODE 0 "register_operand" "") + (match_operand:<ssescalarmode> 1 "register_operand" "") (match_operand 2 "const_int_operand" "")] "TARGET_SSE" { @@ -2786,17 +2786,6 @@ [(set_attr "type" "sselog,ssemov,ssemov,ssemov,ssemov") (set_attr "mode" "V2DF,V1DF,DF,V4SF,V2SF")]) -(define_expand "vec_setv2df" - [(match_operand:V2DF 0 "register_operand" "") - (match_operand:DF 1 "register_operand" "") - (match_operand 2 "const_int_operand" "")] - "TARGET_SSE" -{ - ix86_expand_vector_set (false, operands[0], operands[1], - INTVAL (operands[2])); - DONE; -}) - (define_expand "vec_extractv2df" [(match_operand:DF 0 "register_operand" "") (match_operand:V2DF 1 "register_operand" "") @@ -4921,17 +4910,6 @@ [(set_attr "type" "ssemov,ssemov,ssemov,sselog,ssemov,ssemov,ssemov") (set_attr "mode" "TI,TI,TI,TI,V4SF,V2SF,V2SF")]) -(define_expand "vec_setv2di" - [(match_operand:V2DI 0 "register_operand" "") - (match_operand:DI 1 "register_operand" "") - (match_operand 2 "const_int_operand" "")] - "TARGET_SSE" -{ - ix86_expand_vector_set (false, operands[0], operands[1], - INTVAL (operands[2])); - DONE; -}) - (define_expand "vec_extractv2di" [(match_operand:DI 0 "register_operand" "") (match_operand:V2DI 1 "register_operand" "") @@ -4943,17 +4921,6 @@ DONE; }) -(define_expand "vec_setv4si" - [(match_operand:V4SI 0 "register_operand" "") - (match_operand:SI 1 "register_operand" "") - (match_operand 2 "const_int_operand" "")] - "TARGET_SSE" -{ - ix86_expand_vector_set (false, operands[0], operands[1], - INTVAL (operands[2])); - DONE; -}) - (define_expand "vec_extractv4si" [(match_operand:SI 0 "register_operand" "") (match_operand:V4SI 1 "register_operand" "") @@ -4965,17 +4932,6 @@ DONE; }) -(define_expand "vec_setv8hi" - [(match_operand:V8HI 0 "register_operand" "") - (match_operand:HI 1 "register_operand" "") - (match_operand 2 "const_int_operand" "")] - "TARGET_SSE" -{ - ix86_expand_vector_set (false, operands[0], operands[1], - INTVAL (operands[2])); - DONE; -}) - (define_expand "vec_extractv8hi" [(match_operand:HI 0 "register_operand" "") (match_operand:V8HI 1 "register_operand" "") @@ -4987,17 +4943,6 @@ DONE; }) -(define_expand "vec_setv16qi" - [(match_operand:V16QI 0 "register_operand" "") - (match_operand:QI 1 "register_operand" "") - (match_operand 2 "const_int_operand" "")] - "TARGET_SSE" -{ - ix86_expand_vector_set (false, operands[0], operands[1], - INTVAL (operands[2])); - DONE; -}) - (define_expand "vec_extractv16qi" [(match_operand:QI 0 "register_operand" "") (match_operand:V16QI 1 "register_operand" "") |