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| author | Bernd Schmidt <bernd.schmidt@analog.com> | 2007-02-27 13:55:56 +0000 |
|---|---|---|
| committer | Bernd Schmidt <bernds@gcc.gnu.org> | 2007-02-27 13:55:56 +0000 |
| commit | 329437dd43b86b3a8c5914e70e31b44e921f7fd6 (patch) | |
| tree | c038ffbe745b61c3d26135c1dd6a91969d44fec1 | |
| parent | 2889abeda3921e01414bcce2b306275df76ee2f7 (diff) | |
| download | gcc-329437dd43b86b3a8c5914e70e31b44e921f7fd6.zip gcc-329437dd43b86b3a8c5914e70e31b44e921f7fd6.tar.gz gcc-329437dd43b86b3a8c5914e70e31b44e921f7fd6.tar.bz2 | |
bfin.md (ssashiftv2hi3, [...]): Fix output template to use half reg for operand 2.
* config/bfin/bfin.md (ssashiftv2hi3, ssashifthi3, lshiftv2hi3,
lshifthi3): Fix output template to use half reg for operand 2.
From-SVN: r122374
| -rw-r--r-- | gcc/ChangeLog | 3 | ||||
| -rw-r--r-- | gcc/config/bfin/bfin.md | 8 |
2 files changed, 7 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f6b8edb..91852b9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -40,6 +40,9 @@ usmulhisi_hl_huh, usmulhisi_hh_lul, usmulhisi_hh_luh, usmulhisi_hh_hul, usmulhisi_hh_huh): New patterns. + * config/bfin/bfin.md (ssashiftv2hi3, ssashifthi3, lshiftv2hi3, + lshifthi3): Fix output template to use half reg for operand 2. + 2007-02-27 Andreas Schwab <schwab@suse.de> * Makefile.in (TEXI_GCCINSTALL_FILES): Add gcc-common.texi. diff --git a/gcc/config/bfin/bfin.md b/gcc/config/bfin/bfin.md index 7bdde27..6786902 100644 --- a/gcc/config/bfin/bfin.md +++ b/gcc/config/bfin/bfin.md @@ -3777,7 +3777,7 @@ (ss_ashift:V2HI (match_dup 1) (match_dup 2))))] "" "@ - %0 = ASHIFT %1 BY %2 (V, S)%! + %0 = ASHIFT %1 BY %h2 (V, S)%! %0 = %1 << %2 (V,S)%! %0 = %1 >>> %N2 (V,S)%!" [(set_attr "type" "dsp32")]) @@ -3791,7 +3791,7 @@ (ss_ashift:HI (match_dup 1) (match_dup 2))))] "" "@ - %0 = ASHIFT %1 BY %2 (V, S)%! + %0 = ASHIFT %1 BY %h2 (V, S)%! %0 = %1 << %2 (V,S)%! %0 = %1 >>> %N2 (V,S)%!" [(set_attr "type" "dsp32")]) @@ -3805,7 +3805,7 @@ (ashift:V2HI (match_dup 1) (match_dup 2))))] "" "@ - %0 = LSHIFT %1 BY %2 (V)%! + %0 = LSHIFT %1 BY %h2 (V)%! %0 = %1 << %2 (V)%! %0 = %1 >> %N2 (V)%!" [(set_attr "type" "dsp32")]) @@ -3819,7 +3819,7 @@ (ashift:HI (match_dup 1) (match_dup 2))))] "" "@ - %0 = LSHIFT %1 BY %2 (V)%! + %0 = LSHIFT %1 BY %h2 (V)%! %0 = %1 << %2 (V)%! %0 = %1 >> %N2 (V)%!" [(set_attr "type" "dsp32")]) |